diff options
author | Naresh G Solanki <naresh.solanki@intel.com> | 2017-05-15 16:42:32 +0530 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2017-05-24 08:02:19 +0200 |
commit | 1d407cceaf4ba50b0fb7adacd1e76b4837c89719 (patch) | |
tree | 9a7b1c9e7bec8aff0634fc44db59a87ec8bc4431 /src | |
parent | dd8d24759d88cc5e3a82cdd471f15e1b079aa834 (diff) |
mb/google/poppy: Update SPD data
Though SPD is rightly selected (i.e., H9CCNNNBKTALBR-NUD),
it displays wrong part number during boot in coreboot logs.
So correct part number info within the SPD.
TEST= Build for Soraka & make sure part number is rightly printed.
Change-Id: I67f676fb6ee9d685fa7aa41fdc4b00355e6d33c7
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/19692
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex b/src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex index 95716be588..97d680bfc5 100644 --- a/src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex +++ b/src/mainboard/google/poppy/spd/hynix_dimm_H9CCNNNBKTALBR-NUD.spd.hex @@ -6,8 +6,8 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 AD 01 00 00 00 00 00 00 00 00 -48 39 43 43 4E 4E 4E 43 50 54 41 4C 42 52 2D 4E -54 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00 +48 39 43 43 4E 4E 4E 42 4B 54 41 4C 42 52 2D 4E +55 44 00 00 80 AD 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |