southbridge/nvidia/mcp55: Get rid of #include early_smbus.c

Using linker instead of '#include *.c'.

Change-Id: I74dfa99c8bb3f4ca7ef3d774be2197897022f52c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18484
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

16 files changed, 36 insertions, 22 deletions

diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index 7e98cdc73a..91fded1e05 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -26,7 +26,7 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <lib.h>
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 5c426ef56b..da96ed70c5 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -26,7 +26,7 @@
 #include <console/console.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 5b036d6631..d1c50df33f 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -26,7 +26,7 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <lib.h>
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index 2dd1283bc7..463a7679d0 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -27,7 +27,7 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 7e987a01b9..2f191ee5bb 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -41,7 +41,7 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #include "resourcemap.c"
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 7228c3e185..ac070e9925 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -27,7 +27,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/sunw/ultra40m2/romstage.c b/src/mainboard/sunw/ultra40m2/romstage.c
index 51f5a85138..6c3fdbd4e6 100644
--- a/src/mainboard/sunw/ultra40m2/romstage.c
+++ b/src/mainboard/sunw/ultra40m2/romstage.c
@@ -27,7 +27,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 7d3470f9cc..fdfb124fcb 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -24,7 +24,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN
+#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 7986d50d68..89cea08a9a 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -27,7 +27,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN
+#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 26fba1406a..22c5fd4594 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -42,7 +42,7 @@
 #include <arch/early_variables.h>
 #include <cbmem.h>
 
-#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN
+#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 #include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #include "resourcemap.c"
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index eedc9d08c8..e97af8a4b6 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -41,7 +41,7 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c" // for enable the FAN
+#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
 #include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #include "resourcemap.c"
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 64caabeb37..02b4680287 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -27,7 +27,7 @@
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include <northbridge/amd/amdk8/raminit.h>
 #include <delay.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 4491df56ca..054e143f84 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -41,7 +41,7 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
-#include "southbridge/nvidia/mcp55/early_smbus.c"
+#include <southbridge/nvidia/mcp55/mcp55.h>
 #include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #include "resourcemap.c"
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc
index db275cc848..9b1e133222 100644
--- a/src/southbridge/nvidia/mcp55/Makefile.inc
+++ b/src/southbridge/nvidia/mcp55/Makefile.inc
@@ -19,6 +19,7 @@ ramstage-y += reset.c
 
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-y += early_smbus.c
 
 ifeq ($(CONFIG_MCP55_USE_AZA),y)
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
diff --git a/src/southbridge/nvidia/mcp55/early_smbus.c b/src/southbridge/nvidia/mcp55/early_smbus.c
index 595914af2d..a849ebab92 100644
--- a/src/southbridge/nvidia/mcp55/early_smbus.c
+++ b/src/southbridge/nvidia/mcp55/early_smbus.c
@@ -17,13 +17,16 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
+#include <console/console.h>
 #include "smbus.h"
+#include "mcp55.h"
 
 #define SMBUS0_IO_BASE	0x1000
 #define SMBUS1_IO_BASE	(0x1000 + (1 << 8))
 /* Size: 0x40 */
 
-static void enable_smbus(void)
+void enable_smbus(void)
 {
 	pci_devfn_t dev;
 	dev = pci_locate_device(PCI_ID(0x10de, 0x0368), 0);
@@ -43,47 +46,47 @@ static void enable_smbus(void)
 	outb(inb(SMBUS1_IO_BASE + SMBHSTSTAT), SMBUS1_IO_BASE + SMBHSTSTAT);
 }
 
-static inline int smbus_recv_byte(unsigned device)
+int smbus_recv_byte(unsigned device)
 {
 	return do_smbus_recv_byte(SMBUS0_IO_BASE, device);
 }
 
-static inline int smbus_send_byte(unsigned device, unsigned char val)
+int smbus_send_byte(unsigned device, unsigned char val)
 {
 	return do_smbus_send_byte(SMBUS0_IO_BASE, device, val);
 }
 
-static inline int smbus_read_byte(unsigned device, unsigned address)
+int smbus_read_byte(unsigned device, unsigned address)
 {
 	return do_smbus_read_byte(SMBUS0_IO_BASE, device, address);
 }
 
-static inline int smbus_write_byte(unsigned device, unsigned address,
+int smbus_write_byte(unsigned device, unsigned address,
 				   unsigned char val)
 {
 	return do_smbus_write_byte(SMBUS0_IO_BASE, device, address, val);
 }
 
-static inline int smbusx_recv_byte(unsigned smb_index, unsigned device)
+int smbusx_recv_byte(unsigned smb_index, unsigned device)
 {
 	return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index << 8), device);
 }
 
-static inline int smbusx_send_byte(unsigned smb_index, unsigned device,
+int smbusx_send_byte(unsigned smb_index, unsigned device,
 				   unsigned char val)
 {
 	return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index << 8),
 				  device, val);
 }
 
-static inline int smbusx_read_byte(unsigned smb_index, unsigned device,
+int smbusx_read_byte(unsigned smb_index, unsigned device,
 				   unsigned address)
 {
 	return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index << 8),
 				  device, address);
 }
 
-static inline int smbusx_write_byte(unsigned smb_index, unsigned device,
+int smbusx_write_byte(unsigned smb_index, unsigned device,
 				    unsigned address, unsigned char val)
 {
 	return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index << 8),
diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 3d2b9d6772..a244b82731 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -30,6 +30,16 @@ void mcp55_enable(device_t dev);
 extern struct pci_operations mcp55_pci_ops;
 #else
 void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
+void enable_smbus(void);
+int smbus_recv_byte(unsigned device);
+int smbus_send_byte(unsigned device, unsigned char val);
+int smbus_read_byte(unsigned device, unsigned address);
+int smbus_write_byte(unsigned device, unsigned address, unsigned char val);
+int smbusx_recv_byte(unsigned smb_index, unsigned device);
+int smbusx_send_byte(unsigned smb_index, unsigned device, unsigned char val);
+int smbusx_read_byte(unsigned smb_index, unsigned device, unsigned address);
+int smbusx_write_byte(unsigned smb_index, unsigned device, unsigned address,
+		unsigned char val);
 #endif
 
 #endif