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authorSubrata Banik <subrata.banik@intel.com>2020-11-17 23:53:50 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-11-18 18:13:23 +0000
commitceee6d87ca8a4a95d78c1f5221ac90cacc7cf55b (patch)
tree87a4eee2a98075eef9c233c69da47f5bd1730a21 /src
parent91797c14165fbcdb55024e86648f0d15a55fa92c (diff)
mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics
HPD_1: A19 -> E14 HPD_2: A20 -> A18 Change-Id: Idf3c8f4931bf8364bb9216a9369df7e05dcde047 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/gpio.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index 039a437a1a..a44d4ac43d 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -277,9 +277,9 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A22, NONE, DEEP, NF2),
- /* HPD_1 (A19) and HPD_2 (A20) pins */
- PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
+ /* HPD_1 (E14) and HPD_2 (A18) pins */
+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
+ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
/* IMGCLKOUT */
PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1),