diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-11 19:05:56 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-18 18:40:31 +0200 |
| commit | b05eee46c35487dc694edb5b4d0d070a8d29f915 (patch) | |
| tree | 7d8f971678a6f7645fbd2b3c41140f4e5b4f5df6 /src | |
| parent | 1ac773fa55195b1fd39eeb5ed83b302b04151c58 (diff) | |
northbridge/via/vx800: Convert 'for (;;)' to 'die'
Change-Id: I3f99190401d8df1415328da9c3b928194593901c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16989
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/via/vx800/freq_setting.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/via/vx800/freq_setting.c b/src/northbridge/via/vx800/freq_setting.c index 6592efdefd..4eeba12886 100644 --- a/src/northbridge/via/vx800/freq_setting.c +++ b/src/northbridge/via/vx800/freq_setting.c @@ -134,8 +134,8 @@ void CalcCLAndFreq(DRAM_SYS_ATTR * DramAttr) } } if (!AllDimmSupportedCL) { /*if equal 0, no supported CL */ - PRINT_DEBUG_MEM("SPD Data Error, Can not get CL !!!! \r"); - for (;;); + die("SPD Data Error, Can not get CL !!!! \r"); + } /*Get CL Value */ @@ -192,7 +192,7 @@ void CalcCLAndFreq(DRAM_SYS_ATTR * DramAttr) if (CycTime <= 0) { //error! - for (;;); + die("Error, cycle time <= 0\n"); } /* cycle time value |