diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-11-12 15:43:12 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-13 09:39:27 +0000 |
| commit | a2d123ea9872ff074c32272e7020553e5647ac64 (patch) | |
| tree | df733c72b47df5ba8b3a76ac4d13c4fd79c647ef /src | |
| parent | 87074f904219744291f4fd56e0241d40f2dd583a (diff) | |
nvidia/tegra210: Enable RETURN_FROM_VERSTAGE to free up space
All stages on this board are very close to the limit, so enable
RETURN_FROM_VERSTAGE so that we can overlap verstage and romstage to
use the available SRAM more effectively. (Coincidentally, this also
reduces verstage size quite a bit... maybe we should consider just
making this the default at some point, there are really no downsides.)
Change-Id: I2b91fd13d147f964bcbd7b2850f8a0931ea060df
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36800
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/nvidia/tegra210/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra210/include/soc/memlayout.ld | 5 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/nvidia/tegra210/Kconfig b/src/soc/nvidia/tegra210/Kconfig index 0e1efd7050..780fa18744 100644 --- a/src/soc/nvidia/tegra210/Kconfig +++ b/src/soc/nvidia/tegra210/Kconfig @@ -16,6 +16,7 @@ if SOC_NVIDIA_TEGRA210 config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SEPARATE_VERSTAGE + select VBOOT_RETURN_FROM_VERSTAGE select VBOOT_MUST_REQUEST_DISPLAY config MAINBOARD_DO_DSI_INIT diff --git a/src/soc/nvidia/tegra210/include/soc/memlayout.ld b/src/soc/nvidia/tegra210/include/soc/memlayout.ld index 6d74ab928f..1134da6111 100644 --- a/src/soc/nvidia/tegra210/include/soc/memlayout.ld +++ b/src/soc/nvidia/tegra210/include/soc/memlayout.ld @@ -38,9 +38,8 @@ SECTIONS STACK(0x4000C400, 3K) #endif TIMESTAMP(0x4000D000, 2K) - BOOTBLOCK(0x4000D800, 30K) - VERSTAGE(0x40015000, 68k) - ROMSTAGE(0x40026000, 104K) + BOOTBLOCK(0x4000D800, 42K) + OVERLAP_VERSTAGE_ROMSTAGE(0x40018000, 160K) SRAM_END(0x40040000) DRAM_START(0x80000000) |