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authorVladimir Serbinenko <phcoder@gmail.com>2014-08-08 00:10:28 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-08-09 18:18:41 +0200
commit8a57b3922342bbe4557a9efcd05125dd18c79e84 (patch)
treef32d9c357a25d2a240e3ecc502369333c432775c /src
parent309a7ffc6624f4fad4d7904c78c1a4d35a84bbcf (diff)
lenovo/x201: Enable wake on LID and Fn key.
Change-Id: I485da5b8e9084c73f16b5df1c42879697fc0ac3d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6528 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/x201/smihandler.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index 052981877d..ad3911c709 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -200,3 +200,23 @@ int mainboard_smi_apmc(u8 data)
}
return 0;
}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+ if (slp_typ == 3) {
+ u8 ec_wake = ec_read(0x32);
+ /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
+ if (ec_wake & 0x14) {
+ u32 gpe_rout;
+ u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
+
+ /* Enable EC WAKE GPE. */
+ outl(inl(pmbase + GPE0_EN) | (1 << 29), pmbase + GPE0_EN);
+ gpe_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT);
+ /* Redirect EC WAKE GPE to SCI. */
+ gpe_rout &= ~(3 << 26);
+ gpe_rout |= (2 << 26);
+ pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpe_rout);
+ }
+ }
+}