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authorFelix Singer <felix.singer@secunet.com>2020-04-06 11:01:28 +0200
committerNico Huber <nico.h@gmx.de>2020-04-07 11:25:01 +0000
commit7daf3cd32e259889c0cb419b4440422649d82266 (patch)
treed06019fa668530024b88635ad4104387d5f1130e /src
parent192666f352633466158af1974ecb617395705959 (diff)
sb/intel/bd82x6x/sata: Set values as described in BIOS spec
Set some things missed originally because of formatting issues in the BIOS spec. Values were compared with a vendor dump. Change-Id: I27360d6ea5d1f00b1ed350f47ff40a22f19dfb05 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40231 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 2693e2b63a..c1b61f24c6 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -186,6 +186,11 @@ static void sata_init(struct device *dev)
pch_iobp_update(0xea004001, 0x3fffffff, 0xc0000000);
pch_iobp_update(0xea00408a, 0xfffffcff, 0x00000100);
+
+ pci_update_config32(dev, 0x98,
+ ~(1 << 16 | 0x3f << 7 | 3 << 5 | 3 << 3),
+ 1 << 24 | 1 << 22 | 1 << 20 | 1 << 19 |
+ 1 << 18 | 1 << 14 | 0x04 << 7 | 1 << 3);
}
static void sata_enable(struct device *dev)