aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@gmail.com>2017-02-07 22:07:56 -0600
committerNico Huber <nico.h@gmx.de>2017-02-14 13:03:53 +0100
commit474a7c51cecfd2e37b315da9cfb25607f3ad84f1 (patch)
tree126b3ae7d166557e9c9692d11a7af1c5ca1e565a /src
parentd81078d944bd78b1dca559444d938f18d4004205 (diff)
google/rambi: add explicit pull-down for ram-id
Some variants need the internal pull resistor on GPIO_SSUS_40 set explicitly to pull down rather than disabling the pull, in order for the ram-id to be read correctly via GPIO. Correct this by adding a function to enable and set the internal pull and define its use as needed in the board's variant.h. Chromium source: branch: firmware-gnawty-5216.239.B /src/soc/intel/baytrail/baytrail/gpio.h#418 /src/mainboard/google/gnawty/romstage.c#60 Test: boot 4GB Candy board and observe correct RAM id, amount detected Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/18309 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rambi/romstage.c5
-rw-r--r--src/mainboard/google/rambi/variants/candy/include/variant/variant.h1
-rw-r--r--src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h1
-rw-r--r--src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h2
-rw-r--r--src/soc/intel/baytrail/include/soc/gpio.h7
5 files changed, 15 insertions, 1 deletions
diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c
index d8ba001efa..25fe85952b 100644
--- a/src/mainboard/google/rambi/romstage.c
+++ b/src/mainboard/google/rambi/romstage.c
@@ -32,7 +32,10 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
ssus_disable_internal_pull(GPIO_SSUS_37_PAD);
ssus_disable_internal_pull(GPIO_SSUS_38_PAD);
ssus_disable_internal_pull(GPIO_SSUS_39_PAD);
-#ifdef GPIO_SSUS_40_PAD
+#ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN
+ /* To prevent floating pin on shipped systems. */
+ ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K);
+#elif defined (GPIO_SSUS_40_PAD)
ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
#endif
ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
diff --git a/src/mainboard/google/rambi/variants/candy/include/variant/variant.h b/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
index 0c58ceefa2..fe4c475825 100644
--- a/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
@@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
#define GPIO_SSUS_38_PAD 50
#define GPIO_SSUS_39_PAD 58
#define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
#endif
diff --git a/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h b/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
index 0ea42c52e9..59d5ee1f6d 100644
--- a/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
@@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
#define GPIO_SSUS_38_PAD 50
#define GPIO_SSUS_39_PAD 58
#define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
#endif
diff --git a/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h b/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
index 9bac7bc89e..bd79c982ed 100644
--- a/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
@@ -33,5 +33,7 @@ static const uint32_t dual_channel_config =
#define GPIO_SSUS_37_PAD 57
#define GPIO_SSUS_38_PAD 50
#define GPIO_SSUS_39_PAD 58
+#define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
#endif
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 3757eb012c..9c6b7fd025 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -454,4 +454,11 @@ static inline void ssus_disable_internal_pull(int pad)
write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
}
+static inline void ssus_enable_internal_pull(int pad, int mask)
+{
+ const int pull_mask = ~(0xf << 7);
+ write32(ssus_pconf0(pad),
+ (read32(ssus_pconf0(pad)) & pull_mask) | mask);
+}
+
#endif /* _BAYTRAIL_GPIO_H_ */