diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-07-30 13:34:29 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-13 16:11:58 +0200 |
| commit | 2ca12740716fd70efb50f97b41c539ece43ff66a (patch) | |
| tree | 2d70211ffff47db1da25cab0c36c6ff05bb1d34a /src | |
| parent | 25477e03a117f3f420146ffde4b5c1eda9f5493b (diff) | |
skylake: remove CBFS_SIZE option in SoC directory
CBFS_SIZE is living as a mainboard attribute. Because
of the Kconfig include ordering the SoC *cannot* set
the default. Remove from the soc Kconfig and add a
default Kconfig for SOC_INTEL_SKYLAKE.
BUG=chrome-os-partner:43419
BRANCH=None
TEST=built glados
Original-Change-Id: I8808177b573ce8e2158c9e598dbfea9ff84b97c7
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/289833
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Change-Id: Icf52d7861eee016a35be899e5486deb0924a0f3c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11168
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 11 |
2 files changed, 1 insertions, 11 deletions
diff --git a/src/Kconfig b/src/Kconfig index 8078a76d6e..9c01687249 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -353,6 +353,7 @@ config CBFS_SIZE NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE || \ NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \ SOC_INTEL_BROADWELL + default 0x200000 if SOC_INTEL_SKYLAKE default ROM_SIZE help This is the part of the ROM actually managed by CBFS, located at the diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index d21fe3a5a8..92bae39567 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -70,17 +70,6 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "soc/intel/skylake/bootblock/pch.c" -config CBFS_SIZE - hex "Size of CBFS filesystem in ROM" - default 0x200000 - help - The firmware image has to store more than just coreboot, including: - - a firmware descriptor - - Intel Management Engine firmware - - MRC cache information - This option allows to limit the size of the CBFS portion in the - firmware image. - config CPU_ADDR_BITS int default 36 |