aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorShamile Khan <shamile.khan@intel.com>2018-03-19 17:03:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-03-22 09:01:38 +0000
commit25c1781cba16de70b857cd2084a25d47fc3f2c5d (patch)
tree799bbec0954637e02300817effdd295cf884f23f /src
parent70f051f236dd483536681c19ff5d1ba1e6c99034 (diff)
mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI
BUG=b:73292699 BRANCH=None TEST=Build coreboot for Octopus board. Change-Id: Ic73ad38ad9a12bec614e530f7f35619246b9f57f Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://review.coreboot.org/25288 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 97a13103cf..fb8fe540c9 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -3,6 +3,24 @@ chip soc/intel/apollolake
device lapic 0 on end
end
+ register "pcie_rp_clkreq_pin[0]" = "3" # wifi/bt
+ # Disable unused clkreq of PCIe root ports
+ register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
+ register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
+
+ # Set de-emphasis to disabled for PCIE WiFI (Thunderpeak)
+ # as it is required for detection
+ register "pcie_rp_deemphasis_enable[0]" = "0"
+ # Set de-emphasis to default (enabled) for remaining ports
+ register "pcie_rp_deemphasis_enable[1]" = "1"
+ register "pcie_rp_deemphasis_enable[2]" = "1"
+ register "pcie_rp_deemphasis_enable[3]" = "1"
+ register "pcie_rp_deemphasis_enable[4]" = "1"
+ register "pcie_rp_deemphasis_enable[5]" = "1"
+
# GPIO for PERST_0 (WLAN_PE_RST)
register "prt0_gpio" = "GPIO_164"