diff options
author | Richard Spiegel <richard.spiegel@silverbackltd.com> | 2017-12-13 13:26:21 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-12-15 01:52:04 +0000 |
commit | 138a1d2a6841e12a483b5d9ae771284239d3db7f (patch) | |
tree | e502b49a9b6c01db4641da4102a671c75a94718b /src | |
parent | 14485efbb33e417330df59fcc501b336e14ef55c (diff) |
soc/amd/common: Update agesawrapper_call.h
Solve issues related to agesawrapper_call.h that came up at review
75dd50e233 (review 19724). This includes a hard coded table size and
2 macros: AGESAWRAPPER_PRE_CONSOLE() and AGESAWRAPPER().
Remove AGESAWRAPPER_PRE_CONSOLE(), and replace AGESAWRAPPER() calls with
the actual content of the macro.
BUG=b:62240989
TEST=Build kahlee with no errors, boot recording serial output and compare
to serial output from a build without these changes.
Change-Id: Ic51917d3961a51d4e725ff45b04f45eefe149855
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/22850
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h | 6 | ||||
-rw-r--r-- | src/soc/amd/common/block/pi/amd_late_init.c | 4 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/bootblock/bootblock.c | 5 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/chip.c | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 8 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 2 |
6 files changed, 12 insertions, 15 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h index 4854bee80d..1188f054f5 100644 --- a/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h +++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper_call.h @@ -37,7 +37,7 @@ static const char *decodeAGESA_STATUS(AGESA_STATUS sret) "AGESA_WARNING", "AGESA_ERROR", "AGESA_CRITICAL", "AGESA_FATAL" }; - if (sret > 7) + if (sret >= ARRAY_SIZE(statusStrings)) return "unknown"; /* Non-AGESA error code */ return statusStrings[sret]; } @@ -52,8 +52,4 @@ static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name) return (u32)ret; } -#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func) - -#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func() - #endif /* __AGESAWRAPPER_CALL_H__ */ diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c index 65667b9bdc..3eb3674c09 100644 --- a/src/soc/amd/common/block/pi/amd_late_init.c +++ b/src/soc/amd/common/block/pi/amd_late_init.c @@ -28,12 +28,12 @@ static void agesawrapper_post_device(void *unused) if (acpi_is_wakeup_s3()) return; - AGESAWRAPPER(amdinitlate); + do_agesawrapper(agesawrapper_amdinitlate, "amdinitlate"); if (!acpi_s3_resume_allowed()) return; - AGESAWRAPPER(amdS3Save); + do_agesawrapper(agesawrapper_amdS3Save, "amdS3Save"); } BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, diff --git a/src/soc/amd/stoneyridge/bootblock/bootblock.c b/src/soc/amd/stoneyridge/bootblock/bootblock.c index 030c990c4b..a76eb01bba 100644 --- a/src/soc/amd/stoneyridge/bootblock/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock/bootblock.c @@ -117,8 +117,9 @@ void bootblock_soc_init(void) load_smu_fw1(); post_code(0x37); - AGESAWRAPPER(amdinitreset); + do_agesawrapper(agesawrapper_amdinitreset, "amdinitreset"); post_code(0x38); - AGESAWRAPPER(amdinitearly); /* APs will not exit amdinitearly */ + /* APs will not exit amdinitearly */ + do_agesawrapper(agesawrapper_amdinitearly, "amdinitearly"); } diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 8d6a8e46fe..2602be5087 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -86,7 +86,7 @@ static void earliest_ramstage(void *unused) psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2"); post_code(0x47); - AGESAWRAPPER(amdinitenv); + do_agesawrapper(agesawrapper_amdinitenv, "amdinitenv"); } BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, earliest_ramstage, NULL); diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 27b5388d2a..90ece8e014 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -424,12 +424,12 @@ void domain_read_resources(device_t dev) void domain_enable_resources(device_t dev) { if (acpi_is_wakeup_s3()) - AGESAWRAPPER(fchs3laterestore); + do_agesawrapper(agesawrapper_fchs3laterestore, + "fchs3laterestore"); /* Must be called after PCI enumeration and resource allocation */ - if (!acpi_is_wakeup_s3()) - AGESAWRAPPER(amdinitmid); - + else + do_agesawrapper(agesawrapper_amdinitmid, "amdinitmid"); printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n"); } diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 7c738adc95..24d62895eb 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -45,7 +45,7 @@ asmlinkage void car_stage_entry(void) console_init(); post_code(0x40); - AGESAWRAPPER(amdinitpost); + do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost"); post_code(0x41); /* |