diff options
| author | Chris Ching <chingcodes@google.com> | 2017-10-19 14:37:46 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-22 01:38:50 +0000 |
| commit | 268e1f9119f3853fca5faaa4e00ca4ab8bf49e1d (patch) | |
| tree | 379b43af82595368ff9c80dff7bd8ab3faef3a78 /src | |
| parent | bd31642ad8cc8302e2455a072a745dad9ea579b9 (diff) | |
soc/amd/stoneyridge: Remove duplicate macros in pci_devs.h
BUG=b:68046770
TEST=build
Change-Id: Iea0df0dc7baa384cac45a300fdcc8d59f0aac798
Signed-off-by: Chris Ching <chingcodes@google.com>
Reviewed-on: https://review.coreboot.org/22114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/pci_devs.h | 72 |
1 files changed, 0 insertions, 72 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/pci_devs.h b/src/soc/amd/stoneyridge/include/soc/pci_devs.h index 9b3daecd8d..c02727b31c 100644 --- a/src/soc/amd/stoneyridge/include/soc/pci_devs.h +++ b/src/soc/amd/stoneyridge/include/soc/pci_devs.h @@ -133,78 +133,6 @@ #define NB_DEVID 0x15b5 #define NB_DEVFN PCI_DEVFN(NB_DEV, NB_FUNC) -/* GNB Root Complex */ -#define GNB_DEV 0x0 -#define GNB_FUNC 0 -#define GNB_DEVID 0x1576 -#define GNB_DEVFN PCI_DEVFN(GNB_DEV, GNB_FUNC) - -/* IOMMU */ -#define IOMMU_DEV 0x0 -#define IOMMU_FUNC 2 -#define IOMMU_DEVID 0x1577 -#define IOMMU_DEVFN PCI_DEVFN(IOMMU_DEV, IOMMU_FUNC) - -/* Internal Graphics */ -#define GFX_DEV 0x1 -#define GFX_FUNC 0 -#define GFX_DEVID 098e4 /* subject to SKU/OPN variation */ -#define GFX_DEVFN PCI_DEVFN(GFX_DEV, GFX_FUNC) - -/* HD Audio 0 */ -#define HDA0_DEV 0x1 -#define HDA0_FUNC 1 -#define HDA0_DEVID 015b3 -#define HDA0_DEVFN PCI_DEVFN(HDA0_DEV, HDA0_FUNC) - -/* Host Bridge */ -#define HOST_DEV 0x2 -#define HOST_FUNC 0 -#define HOST_DEVID 0x157b -#define HOST_DEVFN PCI_DEVFN(HOST_DEV, HOST_FUNC) - -/* PCIe GPP Bridge 0 */ -#define PCIE0_DEV 0x2 -#define PCIE0_FUNC 1 -#define PCIE0_DEVID 0x157c -#define PCIE0_DEVFN PCI_DEVFN(PCIE0_DEV, PCIE0_FUNC) - -/* PCIe GPP Bridge 1 */ -#define PCIE1_DEV 0x2 -#define PCIE1_FUNC 2 -#define PCIE1_DEVID 0x157c -#define PCIE1_DEVFN PCI_DEVFN(PCIE1_DEV, PCIE1_FUNC) - -/* PCIe GPP Bridge 2 */ -#define PCIE2_DEV 0x2 -#define PCIE2_FUNC 3 -#define PCIE2_DEVID 0x157c -#define PCIE2_DEVFN PCI_DEVFN(PCIE2_DEV, PCIE2_FUNC) - -/* PCIe GPP Bridge 3 */ -#define PCIE3_DEV 0x2 -#define PCIE3_FUNC 4 -#define PCIE3_DEVID 0x157c -#define PCIE3_DEVFN PCI_DEVFN(PCIE3_DEV, PCIE3_FUNC) - -/* PCIe GPP Bridge 4 */ -#define PCIE4_DEV 0x2 -#define PCIE4_FUNC 5 -#define PCIE4_DEVID 0x157c -#define PCIE4_DEVFN PCI_DEVFN(PCIE4_DEV, PCIE4_FUNC) - -/* Platform Security Processor */ -#define PSP_DEV 0x8 -#define PSP_FUNC 0 -#define PSP_DEVID 0x1578 -#define PSP_DEVFN PCI_DEVFN(PSP_DEV, PSP_FUNC) - -/* HD Audio 1 */ -#define HDA1_DEV 0x9 -#define HDA1_FUNC 2 -#define HDA1_DEVID 0x157a -#define HDA1_DEVFN PCI_DEVFN(HDA1_DEV, HDA1_FUNC) - /* XHCI */ #define XHCI_DEV 0x10 #define XHCI_FUNC 0 |