diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-01-31 17:53:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 07:02:59 +0000 |
| commit | fedc5427fde2d8fa17ebcf168cd90bc33467f07f (patch) | |
| tree | 8e4b7e98244da45a5565fc97a76ece1f4070a35d /src | |
| parent | a0dd454115ad61821b171c400b2b5472f2f5b861 (diff) | |
mb/google/brya: Lock FPMCU pins in brask and brya baseboards
This applies a configuration lock to the FPMCU SPI and IRQ GPIOs
for all brya and brask variants.
BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests `FPMCU_*`
(F11-F13 and F15-F16) are locked.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I1d0b8a5aed6ea54bcfaa267cae5ca78595396ce5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brask/gpio.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brya/gpio.c | 5 |
2 files changed, 5 insertions, 10 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 203f6d9da4..5383aa7b0c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -230,17 +230,17 @@ static const struct pad_config gpio_table[] = { /* F10 : GPPF10_STRAP */ PAD_NC(GPP_F10, DN_20K), /* F11 : THC1_SPI2_CLK ==> GSPI_PCH_CLK_FPMCU_R */ - PAD_CFG_NF(GPP_F11, NONE, DEEP, NF4), + PAD_CFG_NF_LOCK(GPP_F11, NONE, NF4, LOCK_CONFIG), /* F12 : GSXDOUT ==> GSPI_PCH_DO_FPMCU_DI_R */ - PAD_CFG_NF(GPP_F12, NONE, DEEP, NF4), + PAD_CFG_NF_LOCK(GPP_F12, NONE, NF4, LOCK_CONFIG), /* F13 : GSXDOUT ==> GSPI_PCH_DI_FPMCU_DO */ - PAD_CFG_NF(GPP_F13, NONE, DEEP, NF4), + PAD_CFG_NF_LOCK(GPP_F13, NONE, NF4, LOCK_CONFIG), /* F14 : GSXDIN ==> EN_PP3300_SSD */ PAD_CFG_GPO(GPP_F14, 1, DEEP), /* F15 : GSXSRESET# ==> FPMCU_INT_L */ - PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, DEEP, LEVEL, INVERT), + PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F15, NONE, LEVEL, INVERT, LOCK_CONFIG), /* F16 : GSXCLK ==> GSPI_PCH_CS_FPMCU_R_L */ - PAD_CFG_NF(GPP_F16, NONE, DEEP, NF4), + PAD_CFG_NF_LOCK(GPP_F16, NONE, NF4, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_PCH_INT_ODL */ PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, DEEP, LEVEL, INVERT), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index 7db7cd4048..d037e4036a 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -458,11 +458,6 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) } static struct gpio_lock_config lockable_brya_gpios[] = { - { GPP_F11, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CLK_FPMCU_R */ - { GPP_F13, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D1_FPMCU_D0 */ - { GPP_F12, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D0_FPMCU_D1_R */ - { GPP_F15, GPIO_LOCK_CONFIG }, /* FPMCU_INT_L */ - { GPP_F16, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CS_FPMCU_R_L */ }; const struct gpio_lock_config *mb_gpio_lock_config(size_t *num) |