mb/google/brya: Add WWAN poweroff sequence

Follow FIBOCOM_L850-GL Hardware User Manual_V1.0.8.

BUG=b:180166408,b:187691798
TEST=measure WWAN power off by scope is meeting the spec.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I6b2725cd61d5b54bc7fd70a9daffd29e7b43690b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

5 files changed, 30 insertions, 1 deletions

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index f5a76e0df1..4e38415ac0 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -114,4 +114,12 @@ config ROMSTAGE_SPD_CBFS
 	def_bool n
 	select HAVE_SPD_IN_CBFS
 
+config HAVE_WWAN_POWER_SEQUENCE
+	def_bool n
+	help
+	  Select this if the variant has a WWAN module and requires the poweroff sequence
+	  to be performed on shutdown. Must define WWAN_FCPO, WWAN_RST and WWAN_PERST GPIOs
+	  in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time
+	  between RST and FCPO).
+
 endif # BOARD_GOOGLE_BASEBOARD_BRYA || BOARD_GOOGLE_BASEBOARD_BRASK
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index d2171d5857..7dc1afdba9 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -5,6 +5,7 @@ config BOARD_GOOGLE_BRYA0
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9755
 	select DRIVERS_INTEL_MIPI_CAMERA
+	select HAVE_WWAN_POWER_SEQUENCE
 	select SOC_INTEL_COMMON_BLOCK_IPU
 	select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
 
diff --git a/src/mainboard/google/brya/dsdt.asl b/src/mainboard/google/brya/dsdt.asl
index ac5b82ab8d..fed071b5d3 100644
--- a/src/mainboard/google/brya/dsdt.asl
+++ b/src/mainboard/google/brya/dsdt.asl
@@ -23,7 +23,9 @@ DefinitionBlock(
 
 	Scope (\_SB) {
 		#include "mainboard.asl"
-
+#if CONFIG(HAVE_WWAN_POWER_SEQUENCE)
+		#include "wwan_power.asl"
+#endif
 		Device (PCI0)
 		{
 			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
diff --git a/src/mainboard/google/brya/variants/brya0/include/variant/gpio.h b/src/mainboard/google/brya/variants/brya0/include/variant/gpio.h
index 27c87b3fe7..23338de2d8 100644
--- a/src/mainboard/google/brya/variants/brya0/include/variant/gpio.h
+++ b/src/mainboard/google/brya/variants/brya0/include/variant/gpio.h
@@ -5,4 +5,10 @@
 
 #include <baseboard/gpio.h>
 
+#define WWAN_FCPO	GPP_F21
+#define WWAN_RST	GPP_E16
+#define WWAN_PERST	GPP_E0
+#define T1_OFF_MS	16
+#define T2_OFF_MS	2
+
 #endif /* __MAINBOARD_GPIO_H__ */
diff --git a/src/mainboard/google/brya/wwan_power.asl b/src/mainboard/google/brya/wwan_power.asl
new file mode 100644
index 0000000000..d9bb5e7944
--- /dev/null
+++ b/src/mainboard/google/brya/wwan_power.asl
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <variant/gpio.h>
+
+Method (MPTS, 1)
+{
+	\_SB.PCI0.CTXS(WWAN_PERST);
+	Sleep(T1_OFF_MS)
+	\_SB.PCI0.CTXS(WWAN_RST);
+	Sleep(T2_OFF_MS)
+	\_SB.PCI0.CTXS(WWAN_FCPO);
+}