diff options
author | Patrick Georgi <patrick.georgi@secunet.com> | 2011-03-08 07:50:43 +0000 |
---|---|---|
committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-03-08 07:50:43 +0000 |
commit | fab35e3f73ba149eb109c24a8f906347b877d2ea (patch) | |
tree | 82ac7ab90045bc1edc8c8ee477b5bcd54c37ef7a /src | |
parent | 85e666dc37183c491227b794debb24e03a909ac1 (diff) |
Move cmos.default handling to bootblock
The cmos.default code wasn't actually used so far, due to an oversight
when forward-porting this feature from an old branch.
- Extend walkcbfs' use by factoring out the stage handling into C code.
- New sanitize_cmos() function that looks if CMOS data is invalid and
cmos.default exists and if so overwrites CMOS with cmos.default data.
- Use sanitize_cmos() in both bootblock implementations.
- Drop the need to reboot after writing CMOS: CMOS wasn't used so far,
so we can go on without a reboot.
- Remove the restriction that cmos.default only works on CAR boards.
- Always build in cmos.default support on boards that
USE_OPTION_TABLE.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/Kconfig | 6 | ||||
-rw-r--r-- | src/arch/x86/Makefile.bootblock.inc | 2 | ||||
-rw-r--r-- | src/arch/x86/include/bootblock_common.h | 34 | ||||
-rw-r--r-- | src/arch/x86/init/bootblock_normal.c | 4 | ||||
-rw-r--r-- | src/arch/x86/init/bootblock_simple.c | 5 | ||||
-rw-r--r-- | src/arch/x86/lib/walkcbfs.S | 10 | ||||
-rw-r--r-- | src/pc80/mc146818rtc_early.c | 28 |
7 files changed, 42 insertions, 47 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 3684c69e27..aacc0982a6 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -91,14 +91,8 @@ config PC80_SYSTEM config BOOTBLOCK_NORTHBRIDGE_INIT string -config USE_CMOS_RECOVERY - bool - default n if ROMCC - default y - config HAVE_CMOS_DEFAULT def_bool n - depends on USE_CMOS_RECOVERY config CMOS_DEFAULT_FILE string diff --git a/src/arch/x86/Makefile.bootblock.inc b/src/arch/x86/Makefile.bootblock.inc index 31db224915..4958a77cb7 100644 --- a/src/arch/x86/Makefile.bootblock.inc +++ b/src/arch/x86/Makefile.bootblock.inc @@ -57,7 +57,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc +$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" $(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \ $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h index 895a185c6f..a808cec7a5 100644 --- a/src/arch/x86/include/bootblock_common.h +++ b/src/arch/x86/include/bootblock_common.h @@ -17,17 +17,45 @@ static void bootblock_northbridge_init(void) { } static void bootblock_southbridge_init(void) { } #endif -static unsigned long findstage(char* target) +static void *walkcbfs(char *target) { - unsigned long entry; + void *entry; asm volatile ( "mov $1f, %%esp\n\t" - "jmp walkcbfs\n\t" + "jmp walkcbfs_asm\n\t" "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp"); return entry; } +/* just enough to support findstage. copied because the original version doesn't easily pass through romcc */ +struct cbfs_stage { + unsigned long compression; + unsigned long entry; // this is really 64bit, but properly endianized +}; + +static unsigned long findstage(char* target) +{ + return ((struct cbfs_stage*)walkcbfs(target))->entry; +} + static void call(unsigned long addr, unsigned long bist) { asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist)); } + +#if CONFIG_USE_OPTION_TABLE +#include <pc80/mc146818rtc.h> + +static void sanitize_cmos(void) +{ + if (cmos_error() || !cmos_chksum_valid()) { + unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default"); + if (cmos_default) { + int i; + for (i = 14; i < 128; i++) { + cmos_write(cmos_default[i], i); + } + } + } +} +#endif diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c index 08651c32bb..99551484aa 100644 --- a/src/arch/x86/init/bootblock_normal.c +++ b/src/arch/x86/init/bootblock_normal.c @@ -8,6 +8,10 @@ static void main(unsigned long bist) bootblock_southbridge_init(); } +#if CONFIG_USE_OPTION_TABLE + sanitize_cmos(); +#endif + unsigned long entry; if (do_normal_boot()) entry = findstage("normal/romstage"); diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c index e8994ee092..3887b97c58 100644 --- a/src/arch/x86/init/bootblock_simple.c +++ b/src/arch/x86/init/bootblock_simple.c @@ -6,6 +6,11 @@ static void main(unsigned long bist) bootblock_northbridge_init(); bootblock_southbridge_init(); } + +#if CONFIG_USE_OPTION_TABLE + sanitize_cmos(); +#endif + const char* target1 = "fallback/romstage"; unsigned long entry; entry = findstage(target1); diff --git a/src/arch/x86/lib/walkcbfs.S b/src/arch/x86/lib/walkcbfs.S index 395c46e20c..27d82ae742 100644 --- a/src/arch/x86/lib/walkcbfs.S +++ b/src/arch/x86/lib/walkcbfs.S @@ -15,19 +15,13 @@ #define CBFS_FILE_STRUCTSIZE (CBFS_FILE_OFFSET + 4) -#define CBFS_STAGE_COMPRESSION 0 -#define CBFS_STAGE_ENTRY (CBFS_STAGE_COMPRESSION + 4) -#define CBFS_STAGE_LOAD (CBFS_STAGE_ENTRY + 8) -#define CBFS_STAGE_LEN (CBFS_STAGE_LOAD + 8) -#define CBFS_STAGE_MEMLEN (CBFS_STAGE_LEN + 4) - /* input %esi: filename input %esp: return address (not pointer to return address!) output %eax: entry point clobbers %ebx, %ecx, %edi */ -walkcbfs: +walkcbfs_asm: cld mov CBFS_HEADER_PTR, %eax @@ -67,8 +61,6 @@ walker: mov CBFS_FILE_OFFSET(%ebx), %eax bswap %eax add %ebx, %eax - add $CBFS_STAGE_ENTRY, %eax /* eax = ((cbfs_stage* (cbfs_file* ebx)->offset)->entry) */ - mov 0(%eax), %eax jmp *%esp tryharder: diff --git a/src/pc80/mc146818rtc_early.c b/src/pc80/mc146818rtc_early.c index 920dedace2..d09d6b9df0 100644 --- a/src/pc80/mc146818rtc_early.c +++ b/src/pc80/mc146818rtc_early.c @@ -11,15 +11,6 @@ #error "CONFIG_MAX_REBOOT_CNT too high" #endif -#if CONFIG_USE_CMOS_RECOVERY -#include <cbfs.h> -#include <console/loglevel.h> - -int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); -#define printk_warning(fmt, arg...) do_printk(BIOS_WARNING ,fmt, ##arg) -#define printk_debug(fmt, arg...) do_printk(BIOS_DEBUG ,fmt, ##arg) -#endif - static int cmos_error(void) { unsigned char reg_d; @@ -63,25 +54,6 @@ static inline int do_normal_boot(void) unsigned char byte; if (cmos_error() || !cmos_chksum_valid()) { -#if CONFIG_USE_CMOS_RECOVERY - char *cmos_default = cbfs_find_file("cmos.default", CBFS_COMPONENT_CMOS_DEFAULT); - if (cmos_default) { - int i; - printk_warning("WARNING - CMOS CORRUPTED. RESTORING DEFAULTS.\n"); - /* First 14 bytes are reserved for - RTC and ignored by nvramtool, too. - Only 128 bytes: 128+ requires cmos configuration and - contains only suspend-to-ram data, which isn't part - of the recovery procedure. */ - for (i = 14; i < 128; i++) { - cmos_write(cmos_default[i], i); - } - /* Now reboot to run with default cmos. */ - outb(0x06, 0xcf9); - for (;;) asm("hlt"); /* Wait for reset! */ - } -#endif - /* There are no impossible values, no checksums so just * trust whatever value we have in the the cmos, * but clear the fallback bit. |