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authorAnand Vaikar <a.vaikar2021@gmail.com>2024-04-13 18:32:30 +0530
committerFelix Held <felix-coreboot@felixheld.de>2024-04-19 14:12:36 +0000
commitf8a46950cc93db990d00096698d02ba8f12017d1 (patch)
tree8773e6f7db4b8ff330ea9ef457f558af632f24aa /src
parent70108382dec47762bcebf35d7698897bfed177b6 (diff)
soc/amd/glinda: Add support for A0 and B0 steppings
Update the A0 and B0 stepping IDs in CPU table per the PPR document 57254 Rev 1.56 and 1.69 Change-Id: I0072f25f981ac7d5df2522594c8788bfabcbf24c Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/glinda/cpu.c3
-rw-r--r--src/soc/amd/glinda/include/soc/cpu.h4
2 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c
index 06e62c5b21..a7161270d2 100644
--- a/src/soc/amd/glinda/cpu.c
+++ b/src/soc/amd/glinda/cpu.c
@@ -25,7 +25,8 @@ static struct device_operations cpu_dev_ops = {
};
static struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, /* TODO: Update for Glinda */
+ { X86_VENDOR_AMD, GLINDA_A0_CPUID, CPUID_ALL_STEPPINGS_MASK },
+ { X86_VENDOR_AMD, GLINDA_B0_CPUID, CPUID_ALL_STEPPINGS_MASK },
CPU_TABLE_END
};
diff --git a/src/soc/amd/glinda/include/soc/cpu.h b/src/soc/amd/glinda/include/soc/cpu.h
index e7207da7f4..834b1f94e7 100644
--- a/src/soc/amd/glinda/include/soc/cpu.h
+++ b/src/soc/amd/glinda/include/soc/cpu.h
@@ -3,6 +3,6 @@
#ifndef AMD_GLINDA_CPU_H
#define AMD_GLINDA_CPU_H
-#define GLINDA_A0_CPUID CPUID_FROM_FMS(0x17, 0xa0, 0) /* TODO: Update for Glinda */
-
+#define GLINDA_A0_CPUID CPUID_FROM_FMS(0x1a, 0x20, 0)
+#define GLINDA_B0_CPUID CPUID_FROM_FMS(0x1a, 0x24, 0)
#endif /* AMD_GLINDA_CPU_H */