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authorAaron Durbin <adurbin@chromium.org>2016-02-10 10:52:47 -0600
committerMartin Roth <martinroth@google.com>2016-02-19 19:21:15 +0100
commitf6ada1c30755f3de22942996bfcf6490a9b7b6e4 (patch)
treed57d3fd540397690152c81f617f372ed45182ed3 /src
parent38cd3756b8b04786bea75fa10ca59ff3d46ac14e (diff)
lib/coreboot_table: add function to allow arch code to add records
Add lb_arch_add_records() to allow the architecture code to generically hook into the coreboot table generation. BUG=chrome-os-partner:50214 BRANCH=glados TEST=With all subsequent patches confirmed lb_arch_add_records() is called when a strong symbol is provided. Change-Id: I7c69c0ff0801392bbcf5aef586a48388b624afd4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13669 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm/tables.c4
-rw-r--r--src/arch/arm64/tables.c4
-rw-r--r--src/arch/mips/tables.c4
-rw-r--r--src/arch/riscv/tables.c4
-rw-r--r--src/arch/x86/cpu.c5
-rw-r--r--src/include/boot/coreboot_tables.h3
-rw-r--r--src/lib/coreboot_table.c3
7 files changed, 27 insertions, 0 deletions
diff --git a/src/arch/arm/tables.c b/src/arch/arm/tables.c
index 8a4faa17ea..f2d0c86db9 100644
--- a/src/arch/arm/tables.c
+++ b/src/arch/arm/tables.c
@@ -54,3 +54,7 @@ void write_tables(void)
/* Print CBMEM sections */
cbmem_list();
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+}
diff --git a/src/arch/arm64/tables.c b/src/arch/arm64/tables.c
index 8a4faa17ea..f2d0c86db9 100644
--- a/src/arch/arm64/tables.c
+++ b/src/arch/arm64/tables.c
@@ -54,3 +54,7 @@ void write_tables(void)
/* Print CBMEM sections */
cbmem_list();
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+}
diff --git a/src/arch/mips/tables.c b/src/arch/mips/tables.c
index e2e137c1bc..717b7fdfc0 100644
--- a/src/arch/mips/tables.c
+++ b/src/arch/mips/tables.c
@@ -55,3 +55,7 @@ void write_tables(void)
/* Print CBMEM sections */
cbmem_list();
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+}
diff --git a/src/arch/riscv/tables.c b/src/arch/riscv/tables.c
index c73f428725..ca0dd306af 100644
--- a/src/arch/riscv/tables.c
+++ b/src/arch/riscv/tables.c
@@ -62,3 +62,7 @@ void write_tables(void)
{
wtf_write_tables();
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+}
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index d46e591ddd..5afae8b486 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -11,6 +11,7 @@
* GNU General Public License for more details.
*/
+#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <arch/io.h>
@@ -287,3 +288,7 @@ void cpu_initialize(unsigned int index)
return;
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+}
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index ff942f1be1..34183a0d08 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -22,6 +22,9 @@ void lb_board(struct lb_header *header);
/* Define this in soc or fsp driver to add specific table entries. */
void lb_framebuffer(struct lb_header *header);
+/* Allow arch to add records. */
+void lb_arch_add_records(struct lb_header *header);
+
/*
* Function to retrieve MAC address(es) from the VPD and store them in the
* coreboot table.
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 86f22c9689..0cfb8ace8a 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -540,6 +540,9 @@ unsigned long write_coreboot_table(
lb_boot_media_params(head);
+ /* Add architecture records. */
+ lb_arch_add_records(head);
+
/* Add all cbmem entries into the coreboot tables. */
cbmem_add_records_to_cbtable(head);