mb/asrock/h110m: Make use of the chipset devicetree

Use the references from the chipset devicetree as this makes the
comments superfluous and remove devices which are turned off.

Change-Id: I9f92246da4a500e85c878d865d621033f6b35f1b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78593
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>

1 files changed, 17 insertions, 48 deletions

diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index 1e74f0c7c8..a6d16f9cdf 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -43,10 +43,10 @@ chip soc/intel/skylake
 
 	device cpu_cluster 0 on end
 	device domain 0 on
-		device pci 00.0 on # Host Bridge
+		device ref system_agent	on
 			subsystemid 0x1849 0x191f
 		end
-		device pci 01.0 on # PEG
+		device ref peg0		on
 			subsystemid 0x1849 0x1901
 			register "Peg0MaxLinkWidth" = "Peg0_x16"
 
@@ -55,12 +55,11 @@ chip soc/intel/skylake
 			register "PcieRpClkReqNumber[0]"	= "0"
 			register "PcieRpClkSrcNumber[0]"	= "0"
 		end
-		device pci 02.0 on # Integrated Graphics Device
+		device ref igpu		on
 			subsystemid 0x1849 0x1912
 		end
-		device pci 04.0 on  end # Thermal Subsystem
-		device pci 08.0 off end # Gaussian Mixture Model
-		device pci 14.0 on # USB xHCI
+		device ref sa_thermal	on	end
+		device ref south_xhci	on
 			subsystemid 0x1849 0xa131
 
 			register "usb2_ports" = "{
@@ -92,22 +91,13 @@ chip soc/intel/skylake
 				[9] = USB3_PORT_DEFAULT(OC_SKIP),
 			}"
 		end
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on # Thermal Subsystem
+		device ref thermal	on
 			subsystemid 0x1849 0xa131
 		end
-		device pci 15.0 off end # I2C #0
-		device pci 15.1 off end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on      # Management Engine Interface 1
+		device ref heci1	on
 			subsystemid 0x1849 0xa131
 		end
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 on # SATA
+		device ref sata		on
 			subsystemid 0x1849 0xa102
 			register "SataSalpSupport" = "1"
 			# SATA4 and SATA5 are located in the lower right corner of the board,
@@ -122,14 +112,8 @@ chip soc/intel/skylake
 				[3] = 1,
 			}"
 		end
-		device pci 19.0 off end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 off end # I2C #4
-		device pci 1c.0 on  end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 on      # PCI Express Port 5 - PCIE slot
+		device ref pcie_rp1	on	end
+		device ref pcie_rp5	on
 			register "PcieRpEnable[4]"			= "1"
 			register "PcieRpClkReqSupport[4]"		= "1"
 			register "PcieRpClkReqNumber[4]"		= "2"
@@ -138,7 +122,7 @@ chip soc/intel/skylake
 			register "PcieRpClkSrcNumber[4]"		= "2"
 			register "PcieRpHotPlug[4]"			= "1"
 		end
-		device pci 1c.5 on      # PCI Express Port 6 - Onboard LAN
+		device ref pcie_rp6	on
 			register "PcieRpEnable[5]"			= "1"
 
 			# Disable CLKREQ#, since onboard LAN is always present
@@ -147,7 +131,7 @@ chip soc/intel/skylake
 			register "PcieRpLtrEnable[5]"			= "1"
 			register "PcieRpClkSrcNumber[5]"		= "1"
 		end
-		device pci 1c.6 on      # PCI Express Port 7 - PCIE slot
+		device ref pcie_rp7	on
 			register "PcieRpEnable[6]"			= "1"
 			register "PcieRpClkReqSupport[6]"		= "1"
 			register "PcieRpClkReqNumber[6]"		= "3"
@@ -156,19 +140,7 @@ chip soc/intel/skylake
 			register "PcieRpClkSrcNumber[6]"		= "3"
 			register "PcieRpHotPlug[6]"			= "1"
 		end
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 off end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 off end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 off end # SDCard
-		device pci 1f.0 on      # LPC bridge
+		device ref lpc_espi	on
 			subsystemid 0x1849 0x1a43
 
 			# Set @0x280-0x2ff I/O Range for SuperIO HWM
@@ -281,14 +253,11 @@ chip soc/intel/skylake
 			chip drivers/pc80/tpm
 				device pnp 4e.0 on end  # TPM module
 			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on      # Intel HDA
+		end
+		device ref hda		on
 			register "PchHdaVcType" = "Vc1"
 		end
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
+		device ref smbus	on	end
+		device ref fast_spi	on	end
 	end
 end