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authorFelix Held <felix-coreboot@felixheld.de>2021-06-15 16:57:30 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-06-16 16:39:06 +0000
commitec225f01b1ee86ac2985a36866c9a114bfe776be (patch)
treed7771a20bfa0858696c5b4c4f618dfb51d05ea3b /src
parenta4480010a4c060f723eb6c2b4a3edfdb59c61c60 (diff)
soc/amd/cezanne/include/soc/iomap: add eMMC MMIO base addresses
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie97bd6ad076f0ce35fc997d954a003a1252184e9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55536 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/include/soc/iomap.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h
index bd1f73ac94..236578b945 100644
--- a/src/soc/amd/cezanne/include/soc/iomap.h
+++ b/src/soc/amd/cezanne/include/soc/iomap.h
@@ -38,6 +38,9 @@
#define APU_UART0_BASE 0xfedc9000
#define APU_UART1_BASE 0xfedca000
+#define APU_EMMC_BASE 0xfedd5000
+#define APU_EMMC_CONFIG_BASE 0xfedd5800
+
#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1)
#endif /* ENV_X86 */