diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-08-14 21:50:50 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-08-18 01:07:36 +0200 |
| commit | e7de6fb162bb9a7c0551027514596d6d7f45421b (patch) | |
| tree | 099481e2b4a8a0c8a2db1c9859c576c72b539801 /src | |
| parent | 91f6e679ccce9cf90c98608fc2c24aef44db5bf0 (diff) | |
intel/apollolake: Fix check for return value of pmc_gpe_route_to_gpio
pmc_gpe_route_to_gpio returns -1 on error. However, the value was being
stored in unsigned int and compared against -1. Fix this by using local
variable ret.
Change-Id: I5ec824949d4ee0fbdbb2ffdc9fc9d4762455b27b
Reported-by: Coverity ID 1357443, 1357442, 1357441
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16218
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/apollolake/gpio.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c index ac72203ed5..8b89dfd9a0 100644 --- a/src/soc/intel/apollolake/gpio.c +++ b/src/soc/intel/apollolake/gpio.c @@ -361,6 +361,7 @@ void gpio_route_gpe(uint8_t gpe0b, uint8_t gpe0c, uint8_t gpe0d) uint32_t misccfg_mask; uint32_t misccfg_value; uint32_t value; + int ret; /* Get the group here for community specific MISCCFG register. * If any of these returns -1 then there is some error in devicetree @@ -368,15 +369,20 @@ void gpio_route_gpe(uint8_t gpe0b, uint8_t gpe0c, uint8_t gpe0d) * PMC group defines. So we return from here and MISCFG is set to * default. */ - gpe0b = pmc_gpe_route_to_gpio(gpe0b); - if(gpe0b == -1) + ret = pmc_gpe_route_to_gpio(gpe0b); + if (ret == -1) return; - gpe0c = pmc_gpe_route_to_gpio(gpe0c); - if(gpe0c == -1) + gpe0b = ret; + + ret = pmc_gpe_route_to_gpio(gpe0c); + if (ret == -1) return; - gpe0d = pmc_gpe_route_to_gpio(gpe0d); - if(gpe0d == -1) + gpe0c = ret; + + ret = pmc_gpe_route_to_gpio(gpe0d); + if (ret == -1) return; + gpe0d = ret; misccfg_value = gpe0b << MISCCFG_GPE0_DW0_SHIFT; misccfg_value |= gpe0c << MISCCFG_GPE0_DW1_SHIFT; |