diff options
author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2024-05-23 09:14:12 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-27 12:52:42 +0000 |
commit | e5b86c7d5af4a84ea580c154024a1e5a2035ed2a (patch) | |
tree | 70df0f29faf44d301c8be18cd4044fed6aef17e5 /src | |
parent | 02b29e2f5904055ccdc7eb7cce889bca1a514f3c (diff) |
mb/google/ovis/var/deku: Increase TDP PL1 value from 28 W to 33 W
Adjust settings as recommended by thermal team.
Set PL1 max value tdp_pl1_override from 28W to 33W.
PL2, PL4 remain the same as CPU default.
BUG=b:308704811
BRANCH=firmware-rex-15709.B
TEST=emerge-ovis coreboot chromeos-bootimage
built bootleg and verified test result by thermal team
Change-Id: Iad0bca913496dda666ba9bcfe5f6fce1a6396692
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82615
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/rex/variants/deku/overridetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index 8344e3ba55..496af459e3 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -30,6 +30,12 @@ chip soc/intel/meteorlake # Temporary setting TCC of 105C = Tj max (110) - TCC_Offset (5) register "tcc_offset" = "5" + register "power_limits_config[MTL_P_682_482_CORE]" = "{ + .tdp_pl1_override = 33, + .tdp_pl2_override = 64, + .tdp_pl4 = 120, + }" + register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoDisabled, [PchSerialIoIndexI2C1] = PchSerialIoDisabled, |