diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-10 14:01:08 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-12 10:59:21 +0000 |
| commit | d1ccecf6eaf525559ffd21a42db9054aa060e82c (patch) | |
| tree | 88a2bf97dfdc828e94b1ef98ddc21f35532df448 /src | |
| parent | 851fe8334e75d1b3f372f7878745d65c236a12a4 (diff) | |
sb/intel/i82801jx/sata.c: Drop always-false is_mobile check
Also remove the meaningless `sata_traffic_monitor` devicetree option.
Function parameters will be removed in a reproducible follow-up.
Change-Id: I70cf1e06cc8ace504a22be9f9c4441e3070f9e29
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44336
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/dg43gt/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/chip.h | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/sata.c | 17 |
3 files changed, 2 insertions, 17 deletions
diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb index de2d71dd29..bb2456f537 100644 --- a/src/mainboard/intel/dg43gt/devicetree.cb +++ b/src/mainboard/intel/dg43gt/devicetree.cb @@ -22,7 +22,6 @@ chip northbridge/intel/x4x # Northbridge # Set AHCI mode. register "sata_port_map" = "0x1f" register "sata_clock_request" = "0" - register "sata_traffic_monitor" = "0" # Enable PCIe ports 0,2,3 as slots. register "pcie_slot_implemented" = "0xb" diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index cdc1cc5101..e9632d25de 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -43,7 +43,6 @@ struct southbridge_intel_i82801jx_config { /* IDE configuration */ uint8_t sata_port_map : 6; int sata_clock_request : 1; - int sata_traffic_monitor : 1; int c4onc3_enable:1; int c5_enable : 1; diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index 0372460310..b3bed1e76b 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -138,9 +138,6 @@ static void sata_init(struct device *const dev) /* Get the chip configuration */ const config_t *const config = dev->chip_info; - - const u16 devid = pci_read_config16(dev, PCI_DEVICE_ID); - const int is_mobile = (devid == 0x2928) || (devid == 0x2929); u8 sata_mode; printk(BIOS_DEBUG, "i82801jx_sata: initializing...\n"); @@ -202,20 +199,10 @@ static void sata_init(struct device *const dev) sclkcg |= 0x193; pci_write_config32(dev, 0x94, sclkcg); - if (is_mobile && config->sata_traffic_monitor) { - struct device *const lpc_dev = pcidev_on_root(0x1f, 0); - if (((pci_read_config8(lpc_dev, D31F0_CxSTATE_CNF) >> 3) & 3) == 3) { - u8 reg8 = pci_read_config8(dev, 0x9c); - reg8 &= ~(0x1f << 2); - reg8 |= 3 << 2; - pci_write_config8(dev, 0x9c, reg8); - } - } - if (sata_mode == 0) - sata_enable_ahci_mmap(dev, config->sata_port_map, is_mobile); + sata_enable_ahci_mmap(dev, config->sata_port_map, 0); - sata_program_indexed(dev, is_mobile); + sata_program_indexed(dev, 0); } static void sata_enable(struct device *dev) |