diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-20 20:40:32 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-06-22 12:10:17 +0200 |
commit | cf0e60faf4ff50dc9838611bdb22d61119d97cdd (patch) | |
tree | 467fc4b9b139019b2c41b1cea19e0fe0af47b280 /src | |
parent | 8e627a2e51a213b4a71e8aa40667d651fad729b1 (diff) |
ACPI S3: Add common recovery code
There is nothing to backup with RELOCATABLE_RAMSTAGE.
Change-Id: I780a71e48d23e202fb0e9c70e34420066fa0e5b5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15243
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/Makefile.inc | 1 | ||||
-rw-r--r-- | src/arch/x86/acpi_s3.c | 15 | ||||
-rw-r--r-- | src/arch/x86/include/arch/acpi.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/haswell/romstage.c | 19 |
4 files changed, 20 insertions, 17 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 016d9baaf6..be50db1e56 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -331,6 +331,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y) romstage-$(CONFIG_POSTCAR_STAGE) += postcar_loader.c romstage-y += cbmem.c romstage-y += boot.c +romstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c romstage-y += cbfs_and_run.c romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index b6bee0d6a6..7855a2f28d 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -22,6 +22,8 @@ #include <romstage_handoff.h> #include <rules.h> +#if ENV_RAMSTAGE + /* This is filled with acpi_is_wakeup() call early in ramstage. */ int acpi_slp_type = -1; @@ -75,6 +77,19 @@ void acpi_fail_wakeup(void) if (acpi_slp_type == 3 || acpi_slp_type == 2) acpi_slp_type = 0; } +#endif /* ENV_RAMSTAGE */ + +void acpi_prepare_for_resume(void) +{ + if (!HIGH_MEMORY_SAVE) + return; + + /* Back up the OS-controlled memory where ramstage will be loaded. */ + void *src = (void *)CONFIG_RAMBASE; + void *dest = cbmem_find(CBMEM_ID_RESUME); + if (dest != NULL) + memcpy(dest, src, HIGH_MEMORY_SAVE); +} void acpi_prepare_resume_backup(void) { diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index b79dcac6a6..7434000560 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -636,12 +636,14 @@ int acpi_is_wakeup(void); int acpi_is_wakeup_s3(void); int acpi_is_wakeup_s4(void); #endif +void acpi_prepare_for_resume(void); #else #define acpi_slp_type 0 static inline int acpi_is_wakeup(void) { return 0; } static inline int acpi_is_wakeup_s3(void) { return 0; } static inline int acpi_is_wakeup_s4(void) { return 0; } +static inline void acpi_prepare_for_resume(void) { } #endif static inline uintptr_t acpi_align_current(uintptr_t current) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 0e8fd09837..11d449c1ae 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -273,29 +273,14 @@ void romstage_common(const struct romstage_params *params) } } -static inline void prepare_for_resume(struct romstage_handoff *handoff) -{ -/* Only need to save memory when ramstage isn't relocatable. */ -#if !CONFIG_RELOCATABLE_RAMSTAGE -#if CONFIG_HAVE_ACPI_RESUME - /* Back up the OS-controlled memory where ramstage will be loaded. */ - if (handoff != NULL && handoff->s3_resume) { - void *src = (void *)CONFIG_RAMBASE; - void *dest = cbmem_find(CBMEM_ID_RESUME); - if (dest != NULL) - memcpy(dest, src, HIGH_MEMORY_SAVE); - } -#endif -#endif -} - void romstage_after_car(void) { struct romstage_handoff *handoff; handoff = romstage_handoff_find_or_add(); - prepare_for_resume(handoff); + if (handoff != NULL && handoff->s3_resume) + acpi_prepare_for_resume(); /* Load the ramstage. */ copy_and_run(); |