diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2022-02-21 20:01:45 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-09 14:31:15 +0000 |
| commit | cb783c87d21745cf864322f9021ace9ecc590d43 (patch) | |
| tree | 76a4a82c761dd459e8284837968c0112c6039238 /src | |
| parent | ada2a63dabe566b1cb8ebb9d909fa2c07f296136 (diff) | |
soc/mediatek/mt8186: set pin drive strength to 8mA for NOR
Set NOR pin drive to 8mA to comply with HW requirement.
This implementation is according to chapter 5.1, 5.6 and 5.8 in MT8186
Functional Specification.
BUG=b:218775654, b:216462313, b:212375511
TEST=SPI SI tests for AP to NOR pass for both kingler and krabby.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I5b6e37b0f7d4207ea35f11394d25ad1e096ac01a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/mediatek/mt8186/spi.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/spi.c b/src/soc/mediatek/mt8186/spi.c index d4d3684d32..11f8b6ae92 100644 --- a/src/soc/mediatek/mt8186/spi.c +++ b/src/soc/mediatek/mt8186/spi.c @@ -6,6 +6,7 @@ */ #include <assert.h> +#include <console/console.h> #include <device/mmio.h> #include <spi_flash.h> #include <soc/addressmap.h> @@ -147,6 +148,14 @@ void mtk_snfc_init(int gpio_set) for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux[gpio_set]); i++) { gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select); gpio_set_mode(ptr[i].gpio, ptr[i].func); + + if (gpio_set_driving(ptr[i].gpio, GPIO_DRV_8_MA) < 0) + printk(BIOS_WARNING, + "%s: failed to set pin drive to 8 mA for %d\n", + __func__, ptr[i].gpio.id); + else + printk(BIOS_DEBUG, "%s: got pin drive: %#x\n", __func__, + gpio_get_driving(ptr[i].gpio)); } } |