diff options
author | Subrata Banik <subratabanik@google.com> | 2022-02-16 15:46:52 +0530 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-18 14:53:27 +0000 |
commit | cb6e4926e78dda8b09eef5fc7371942f0bccc1fb (patch) | |
tree | 483810b3f77f7f9a27b7cde4cc22c0fb0eff3df2 /src | |
parent | b29d1280238b7c56abbc840b93635e480f5d9727 (diff) |
mb/google/brya/var/volmar: Fix PLD group order
In ec/google/chromeec: Add PLD to EC conn in ACPI table
(667471b8d807da5a5a9277db47e069ad3b1351c7), PLD is added to ACPI table.
This patch ensures USB _PLD group numbers are appear in order.
BUG=b:216490477
TEST=build coreboot and system boot into OS.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Iddf0727a538f2063cfabbec1f900c488331f33c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/brya/variants/volmar/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb index 00de8f5b5b..66cbb95d1e 100644 --- a/src/mainboard/google/brya/variants/volmar/overridetree.cb +++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb @@ -354,7 +354,7 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref tcss_usb3_port3 on end end end @@ -372,7 +372,7 @@ chip soc/intel/alderlake chip drivers/usb/acpi register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" - register "group" = "ACPI_PLD_GROUP(3, 1)" + register "group" = "ACPI_PLD_GROUP(2, 1)" device ref usb2_port3 on end end chip drivers/usb/acpi |