diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-07-21 14:16:39 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-13 16:43:19 +0000 |
| commit | caa5f59279e0c0f49cfe18290abc11b5f3af72c3 (patch) | |
| tree | 92226a30661ebc26ba515acf0cea91dc9b955de9 /src | |
| parent | cb09b857995de0fa908190a662112e13c2d83c47 (diff) | |
Revert "soc/intel/alderlake: Enable energy efficiency turbo mode"
This reverts commit 844dcb3725fc95df53a7229703f5059d2c36f98e.
A power and performance analysis performed on Alder Lake demonstrated
that with an EPP (Energy Performance Preference) at 50% along with
EET (Energy Efficient Turbo) disabled, the overall SoC performance are
similar or better and the SoC uses less power.
For instance some browser benchmark results improved by 2% and some
multi-core tests by 4% while at the same time power consumption
lowered by approximately 7.6%.
BRANCH=firmware-brya-14505.B
BUG=b:240669428
TEST=verify that ETT is disabled
`iotools rdmsr 0 0x1fc'
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I96a72009aaf96d4237d57f4d5c8b1f41f87174d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66281
Reviewed-by: Zhixing Ma <zhixing.ma@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 592afb8d97..1e1f61077e 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -930,8 +930,6 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, s_cfg->Hwp = 1; s_cfg->Cx = 1; s_cfg->PsOnEnable = 1; - /* Enable the energy efficient turbo mode */ - s_cfg->EnergyEfficientTurbo = 1; s_cfg->PkgCStateLimit = LIMIT_AUTO; /* VccIn Aux Imon IccMax. Values are in 1/4 Amp increments and range is 0-512. */ |