diff options
author | Shiyu Sun <sshiyu@google.com> | 2020-06-12 02:41:30 +1000 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-14 16:47:41 +0000 |
commit | c8fa51b8770a81f15a1bb9f609420436928f3244 (patch) | |
tree | 8d585a45fc11ad80efd0fcfbed1e98093fba7182 /src | |
parent | bc0fc39022a5564f84a315269d7a33445f92acb5 (diff) |
mb/google/puff: add MST and LSPCON details to devicetree
Added device hid info to the MST and LSPCON devices.
BRANCH=None
BUG=b:156546414
TEST=Manual tested and able to see update on sysfs and ssdt table
Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Change-Id: Iaef6c08f241ea671d1487a8524162dbb438b8e98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/hatch/variants/puff/overridetree.cb | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index ea6e177024..ededac42ed 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -280,8 +280,22 @@ chip soc/intel/cannonlake # RFU - Reserved for Future Use. end # I2C #0 device pci 15.1 off end # I2C #1 - device pci 15.2 on end # I2C #2, PCON PS175. - device pci 15.3 on end # I2C #3, Realtek RTD2142. + device pci 15.2 on + chip drivers/i2c/generic + register "hid" = ""1AF80175"" + register "name" = ""PS17"" + register "desc" = ""Parade PS175"" + device i2c 4a on end + end + end # I2C #2, PCON PS175. + device pci 15.3 on + chip drivers/i2c/generic + register "hid" = ""10EC2142"" + register "name" = ""RTD2"" + register "desc" = ""Realtek RTD2142"" + device i2c 4a on end + end + end # I2C #3, Realtek RTD2142. device pci 19.0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" |