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authorJohnny Lin <johnny_lin@wiwynn.com>2020-07-07 12:15:11 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-07-12 19:39:05 +0000
commitc8d8777750d00f9a0437462a333dfec7abaf0ac0 (patch)
tree4de4360771251786ae12b785dd2a159fe53b6b63 /src
parent86acc04d2874fb9ef00408a4b96d496030a95eb1 (diff)
mb/ocp/deltalake: Pull POST complete pin low before booting payload
Delta Lake uses GPIO pin GPP_B20 for POST complete event, BIOS needs to pull this pin low for BIC (Bridge IC) to start reading sensors. Tested=On Delta Lake oBMC, bic-util slotx --get_gpio to confirm the pin is low. Change-Id: I7e05f8a7caead8ee0632af4ff60ccd8b2412b3dd Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43162 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/ocp/deltalake/ramstage.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index 9380304c0a..88f89b5817 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -1,8 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
+#include <bootstate.h>
#include <drivers/ipmi/ipmi_ops.h>
#include <drivers/ocp/dmi/ocp_dmi.h>
+#include <gpio.h>
+#include <soc/lewisburg_pch_gpio_defs.h>
#include <soc/ramstage.h>
#include <stdio.h>
@@ -92,3 +95,11 @@ struct chip_operations mainboard_ops = {
.enable_dev = mainboard_enable,
.final = mainboard_final,
};
+
+static void pull_post_complete_pin(void *unused)
+{
+ /* Pull Low post complete pin */
+ gpio_output(GPP_B20, 0);
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, pull_post_complete_pin, NULL);