diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-08 06:49:12 +0100 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-11-09 18:05:55 +0000 |
commit | c8a20b9d3b8939e4b7d259c5857631c9690657de (patch) | |
tree | 42654e9d79d00b52fff07e05e364c3a7fca133e2 /src | |
parent | 753827ef333cf1d4f08b017f197cc4337e980fd6 (diff) |
cpu/*: Drop PARALLEL_MP leftovers
These symbols and codepaths are unused now so drop them.
Change-Id: I7c46c36390f116f8f8920c06e539075e60c7118c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69361
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/intel/hyperthreading/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/intel/hyperthreading/intel_sibling.c | 65 | ||||
-rw-r--r-- | src/cpu/intel/model_f3x/Makefile.inc | 1 | ||||
-rw-r--r-- | src/cpu/intel/model_f3x/model_f3x_init.c | 14 | ||||
-rw-r--r-- | src/cpu/x86/Kconfig.debug_cpu | 4 | ||||
-rw-r--r-- | src/include/cpu/intel/hyperthreading.h | 9 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-i440fx/northbridge.c | 34 |
7 files changed, 1 insertions, 127 deletions
diff --git a/src/cpu/intel/hyperthreading/Makefile.inc b/src/cpu/intel/hyperthreading/Makefile.inc deleted file mode 100644 index 8adbad9e21..0000000000 --- a/src/cpu/intel/hyperthreading/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -ramstage-y += intel_sibling.c diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c deleted file mode 100644 index 773d8e261c..0000000000 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ /dev/null @@ -1,65 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <cpu/cpu.h> -#include <cpu/intel/hyperthreading.h> -#include <device/device.h> -#include <option.h> - -/* Intel hyper-threading requires serialized CPU init. */ - -static int first_time = 1; -static int disable_siblings = !CONFIG(LOGICAL_CPUS); - -void intel_sibling_init(struct device *cpu) -{ - unsigned int i, siblings; - struct cpuid_result result; - - /* On the bootstrap processor see if I want sibling cpus enabled */ - if (first_time) { - first_time = 0; - disable_siblings = get_uint_option("hyper_threading", disable_siblings); - } - result = cpuid(1); - /* Is hyperthreading supported */ - if (!(result.edx & (1 << 28))) - return; - - /* See how many sibling cpus we have */ - siblings = (result.ebx >> 16) & 0xff; - if (siblings < 1) - siblings = 1; - - printk(BIOS_DEBUG, "CPU: %u %d siblings\n", - cpu->path.apic.apic_id, - siblings); - - /* See if I am a sibling cpu */ - if (cpu->path.apic.apic_id & (siblings - 1)) { - if (disable_siblings) - cpu->enabled = 0; - return; - } - - /* I am the primary CPU start up my siblings */ - for (i = 1; i < siblings; i++) { - struct device_path cpu_path; - struct device *new; - /* Build the CPU device path */ - cpu_path.type = DEVICE_PATH_APIC; - cpu_path.apic.apic_id = cpu->path.apic.apic_id + i; - - /* Allocate new CPU device structure iff sibling CPU - * was not in static device tree. - */ - new = alloc_find_dev(cpu->bus, &cpu_path); - - if (!new) - continue; - - printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", - cpu->path.apic.apic_id, - new->path.apic.apic_id); - } -} diff --git a/src/cpu/intel/model_f3x/Makefile.inc b/src/cpu/intel/model_f3x/Makefile.inc index c855996cf1..95b56f4a91 100644 --- a/src/cpu/intel/model_f3x/Makefile.inc +++ b/src/cpu/intel/model_f3x/Makefile.inc @@ -1,6 +1,5 @@ ramstage-y += model_f3x_init.c -subdirs-y += ../hyperthreading subdirs-y += ../smm/gen1 ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 198490ff85..bcbfdcf658 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -2,7 +2,6 @@ #include <cpu/cpu.h> #include <cpu/intel/common/common.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> @@ -12,19 +11,6 @@ static void model_f3x_init(struct device *cpu) { /* Turn on caching if we haven't already */ enable_cache(); - - if (!CONFIG(PARALLEL_MP) && !intel_ht_sibling()) { - /* MTRRs are shared between threads */ - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - } - - /* Start up my CPU siblings */ - if (!CONFIG(PARALLEL_MP)) - intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/x86/Kconfig.debug_cpu b/src/cpu/x86/Kconfig.debug_cpu index 7edb60f445..8e0c3e4233 100644 --- a/src/cpu/x86/Kconfig.debug_cpu +++ b/src/cpu/x86/Kconfig.debug_cpu @@ -10,8 +10,4 @@ config DEBUG_CAR config DISPLAY_MTRRS bool "Display intermediate MTRR settings" -config DEBUG_SMM_RELOCATION - bool "Debug SMM relocation code" - depends on HAVE_SMI_HANDLER && SMM_ASEG - endif # ARCH_X86 diff --git a/src/include/cpu/intel/hyperthreading.h b/src/include/cpu/intel/hyperthreading.h deleted file mode 100644 index 0613aa114f..0000000000 --- a/src/include/cpu/intel/hyperthreading.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef CPU_INTEL_HYPERTHREADING_H -#define CPU_INTEL_HYPERTHREADING_H - -struct device; -void intel_sibling_init(struct device *cpu); - -#endif /* CPU_INTEL_HYPERTHREADING_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 957837ef23..56693c3578 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -254,45 +254,13 @@ void mp_init_cpus(struct bus *cpu_bus) static void cpu_bus_init(struct device *dev) { - if (CONFIG(PARALLEL_MP)) - mp_cpu_bus_init(dev); - else - initialize_cpus(dev->link_list); -} - -static void cpu_bus_scan(struct device *bus) -{ - unsigned int max_cpus = fw_cfg_max_cpus(); - struct device *cpu; - int i; - - if (max_cpus == 0) - return; - /* - * Do not install more CPUs than supported by coreboot. - * This will cause a buffer overflow where fixed arrays of CONFIG_MAX_CPUS - * are used and might result in a boot failure. - */ - max_cpus = MIN(max_cpus, CONFIG_MAX_CPUS); - - /* - * TODO: This only handles the simple "qemu -smp $nr" case - * correctly. qemu also allows to specify the number of - * cores, threads & sockets. - */ - printk(BIOS_INFO, "QEMU: max_cpus is %d\n", max_cpus); - for (i = 0; i < max_cpus; i++) { - cpu = add_cpu_device(bus->link_list, i, 1); - if (cpu) - set_cpu_topology(cpu, 1, 0, i, 0); - } + mp_cpu_bus_init(dev); } static struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = cpu_bus_init, - .scan_bus = cpu_bus_scan, }; static void northbridge_enable(struct device *dev) |