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authorFrank Wu <frank_wu@compal.corp-partner.google.com>2022-04-26 16:13:41 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-04-27 20:16:22 +0000
commitc4af5e4009274f5a0db9efa689fb2ac34449b287 (patch)
tree8401ed482205ec81e3d0596f850ffa2386fd5963 /src
parent2f4246ab0c3948d791c50aa2450f522e2b009e5b (diff)
mb/google/brya/var/banshee: Update the FIVR configurations
This patch enables V1p05 and Vnn external bypass VRs for Banshee. BUG=b:207116793 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Change-Id: Idb56890db40f90f163d8dadf5bf7c7335469771a Reviewed-on: https://review.coreboot.org/c/coreboot/+/63860 Reviewed-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/banshee/overridetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/banshee/overridetree.cb b/src/mainboard/google/brya/variants/banshee/overridetree.cb
index 866bbd6bbb..6647158d01 100644
--- a/src/mainboard/google/brya/variants/banshee/overridetree.cb
+++ b/src/mainboard/google/brya/variants/banshee/overridetree.cb
@@ -22,6 +22,20 @@ chip soc/intel/alderlake
},
}"
+ register "ext_fivr_settings" = "{
+ .configure_ext_fivr = 1,
+ .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
+ .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
+ .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+ FIVR_VOLTAGE_MIN_ACTIVE |
+ FIVR_VOLTAGE_MIN_RETENTION,
+ .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+ FIVR_VOLTAGE_MIN_ACTIVE |
+ FIVR_VOLTAGE_MIN_RETENTION,
+ .v1p05_icc_max_ma = 500,
+ .vnn_sx_voltage_mv = 1250,
+ }"
+
register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port 3
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port 4
register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable Port 6