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| author | Subrata Banik <subratabanik@google.com> | 2024-03-02 21:02:06 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-03-04 13:34:03 +0000 |
| commit | bcdbb44805c39e689171600db8351a965e6700ef (patch) | |
| tree | 1261d7ae437a6c32d85837ea6f5ca486d5c818e1 /src | |
| parent | 4efd2e3aae8089fab95564bbc3bf940b2db04f6c (diff) | |
soc/intel/cmn/cse: Use CSE RW partition version directly for CBFS entry
This patch automates the process of determining the CSE RW version used
for the CBFS entry, eliminating the need for manual configuration in
CONFIG_SOC_INTEL_CSE_RW_VERSION.
How to get CSE RW Version:
1. Open CSE RW file as per CONFIG_SOC_INTEL_CSE_RW_FILE
2. Read offset 16 (0x10) to know the CSE version
3. Format:
- CSE_VERSION_MAJOR : offset 16-17
- CSE_VERSION_MINOR : offset 18-19
- CSE_VERSION_HOTFIX: offset 20-21
- CSE_VERSION_HOTFIX: offset 22-23
Benefits:
- Removes error-prone manual version updates.
- Prevents boot loops due to mismatched CSE RW versions (actual vs config)
- Eliminates the need for SKU-specific CSE version limitations.
BUG=b:327842062
TEST=CSE RW update successful on Screebo with this patch.
Example Debug Output:
[DEBUG] cse_lite: RO version = 18.0.5.2066
[DEBUG] cse_lite: RW version = 18.0.5.2107
Change-Id: I0165d81b0e4b38e0e097956f250bb7484d774145
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80923
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cse/Makefile.mk | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/cse/Makefile.mk b/src/soc/intel/common/block/cse/Makefile.mk index 33277571f6..653d67463c 100644 --- a/src/soc/intel/common/block/cse/Makefile.mk +++ b/src/soc/intel/common/block/cse/Makefile.mk @@ -68,10 +68,6 @@ endif ifeq ($(CONFIG_SOC_INTEL_CSE_RW_UPDATE),y) -ifeq ($(CONFIG_SOC_INTEL_CSE_RW_VERSION),"") -$(error "CSE RW version is missing and need to be set by mainboard config") -endif - ifneq ($(CONFIG_STITCH_ME_BIN),y) ifeq ($(CONFIG_SOC_INTEL_CSE_RW_FILE),"") @@ -93,8 +89,20 @@ ifeq ($(CONFIG_SOC_INTEL_CSE_LITE_COMPRESS_ME_RW),y) $(CSE_LITE_ME_RW)-compression := LZMA endif +INPUT_FILE := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE)) +TEMP_FILE := $(shell mktemp) +OFFSETS := 16 18 20 22 # Offsets for CSE version components +VERSIONS := CSE_VERSION_MAJOR CSE_VERSION_MINOR CSE_VERSION_HOTFIX CSE_VERSION_BUILD +INDEXES := $(shell seq 1 $(words $(OFFSETS))) + $(obj)/cse_rw.version: - @echo '$(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION))' > $@ + $(foreach index,$(INDEXES), \ + $(shell dd if=$(INPUT_FILE) of=$(TEMP_FILE) bs=1 skip=$(word $(index),$(OFFSETS)) count=2 status=none) \ + $(eval $(word $(index),$(VERSIONS)) := $(shell printf "%d" 0x$(shell echo $(shell echo $(shell xxd -p $(TEMP_FILE)) | cut -c3-4)$(shell echo $(shell xxd -p $(TEMP_FILE)) | cut -c1-2))) ) \ + ) + rm -f $(TEMP_FILE) + $(eval CSE_RW_CBFS_VERSION := $(shell printf "%d.%d.%d.%d" $(CSE_VERSION_MAJOR)$(CSE_VERSION_MINOR)$(CSE_VERSION_HOTFIX)$(CSE_VERSION_BUILD))) + @echo '$(CSE_RW_CBFS_VERSION)' > $@ CSE_RW_VERSION = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME)) regions-for-file-$(CSE_RW_VERSION) = FW_MAIN_A,FW_MAIN_B |