diff options
| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2019-08-20 13:27:50 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-30 10:37:55 +0000 |
| commit | b685e921bbea924314a697179943a95dbf280c6b (patch) | |
| tree | be467d63ac3d7812040e4b17eee8c5e43b28b98b /src | |
| parent | 0a8da746c21818429f3799a1956958830bbf22f6 (diff) | |
mb/google/hatch: Add settings for noise mitgation
Enable acoustic noise mitgation for hatch platform, the slow slew rates
are fast time dived by 8 and disable Fast PKG C State Ramp(IA, GT, SA).
BUG=b:131779678
TEST=waveform test and reduce the noise level.
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I49e834825b3f1e5bf02f9523d7caa93b544c9d17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35005
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/hatch/variants/hatch/overridetree.cb | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 880d19fab1..6ed25c80ca 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -15,6 +15,15 @@ chip soc/intel/cannonlake [PchSerialIoIndexUART2] = PchSerialIoDisabled, }" + # VR Slew rate setting + register "AcousticNoiseMitigation" = "1" + register "SlowSlewRateForIa" = "2" + register "SlowSlewRateForGt" = "2" + register "SlowSlewRateForSa" = "2" + register "FastPkgCRampDisableIa" = "1" + register "FastPkgCRampDisableGt" = "1" + register "FastPkgCRampDisableSa" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |