diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2024-05-21 16:34:55 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-22 15:45:08 +0000 |
commit | abcbd5b998b4a9f5f27c356655f439e817f3bcc5 (patch) | |
tree | 56195887e44382a717bb4276e0f92411d6dfd2a6 /src | |
parent | 59d1796d668470d99aee80922b12e3f95550ffff (diff) |
mb/amd/birman/devicetree_phoenix_opensil: remove unexpected '<'
Remove the unexpected '<' char at the end of the comment about the PSPP
policy config.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id821351ce3a7a2b7844d8e7478fa3de3227a7da9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82579
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/amd/birman/devicetree_phoenix_opensil.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb index d1b5e11a38..bca45598b9 100644 --- a/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb +++ b/src/mainboard/amd/birman/devicetree_phoenix_opensil.cb @@ -39,7 +39,7 @@ chip soc/amd/phoenix register "s0ix_enable" = "true" - register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works< + register "pspp_policy" = "DXIO_PSPP_DISABLED" # TODO: reenable when PSPP works device domain 0 on device ref iommu on end |