diff options
| author | V Sowmya <v.sowmya@intel.com> | 2021-05-19 09:39:16 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-24 19:11:11 +0000 |
| commit | a56fffd6455449eba44ac3746c3c4f3f86731ba7 (patch) | |
| tree | 078a1505fa22a6cdb7d676f29c065a483e034a17 /src | |
| parent | c5f3c01b80f051cffe26b7e79c837613581fdb29 (diff) | |
mb/google/brya: Enable SaGv support
This patch enabled the SaGv support for brya0 baseboard.
BUG=b:187446498
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I2a71e159fa49f677660af8279f2b582a3916eee2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 3e02642d53..9b451541be 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -30,7 +30,7 @@ fw_config end chip soc/intel/alderlake - register "SaGv" = "SaGv_Disabled" + register "SaGv" = "SaGv_Enabled" register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port |