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authorFelix Held <felix-coreboot@felixheld.de>2024-08-24 00:16:04 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-08-27 11:34:46 +0000
commita28b518ba97d906384f636a2b6ebc0353f08bc59 (patch)
treefc79a42ca3760b33141b2cb885fa1a92ac4af0bf /src
parentef8fdd9d3e7bbceb7425602e0cd233ecfedbc031 (diff)
soc/amd/common/psp/psp_smi_flash: implement generation 1 support
Implement the request buffer access functions for the PSP generation 1 case. In this case, only the SMI_TARGET_NVRAM is supported, so always return this target NV ID and always return true in the validity checks which in the PSP generation 2 case check if the target NV ID is valid. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7e141f846e930bab6972a281745c0180ac52c291 Reviewed-on: https://review.coreboot.org/c/coreboot/+/84064 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/common/block/psp/Makefile.mk2
-rw-r--r--src/soc/amd/common/block/psp/psp_smi_flash_gen1.c52
2 files changed, 54 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/psp/Makefile.mk b/src/soc/amd/common/block/psp/Makefile.mk
index 20e55e80cb..937cb8e649 100644
--- a/src/soc/amd/common/block/psp/Makefile.mk
+++ b/src/soc/amd/common/block/psp/Makefile.mk
@@ -17,7 +17,9 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y)
romstage-y += psp_gen1.c
ramstage-y += psp_gen1.c
+
smm-y += psp_gen1.c
+smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SMI) += psp_smi_flash_gen1.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1
diff --git a/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c b/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c
new file mode 100644
index 0000000000..c9beddbda7
--- /dev/null
+++ b/src/soc/amd/common/block/psp/psp_smi_flash_gen1.c
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <types.h>
+#include "psp_def.h"
+#include "psp_smi_flash.h"
+
+bool is_valid_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf)
+{
+ return true;
+}
+
+bool is_valid_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf)
+{
+ return true;
+}
+
+bool is_valid_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf)
+{
+ return true;
+}
+
+u64 get_psp_spi_info_id(struct mbox_psp_cmd_spi_info *cmd_buf)
+{
+ return SMI_TARGET_NVRAM;
+}
+
+void set_psp_spi_info(struct mbox_psp_cmd_spi_info *cmd_buf, u64 lba, u64 block_size,
+ u64 num_blocks)
+{
+ write64(&cmd_buf->req.lba, lba);
+ write64(&cmd_buf->req.block_size, block_size);
+ write64(&cmd_buf->req.num_blocks, num_blocks);
+}
+
+void get_psp_spi_read_write(struct mbox_psp_cmd_spi_read_write *cmd_buf, u64 *target_nv_id,
+ u64 *lba, u64 *offset, u64 *num_bytes, u8 **data)
+{
+ *target_nv_id = SMI_TARGET_NVRAM;
+ *lba = read64(&cmd_buf->req.lba);
+ *offset = read64(&cmd_buf->req.offset);
+ *num_bytes = read64(&cmd_buf->req.num_bytes);
+ *data = cmd_buf->req.buffer;
+}
+
+void get_psp_spi_erase(struct mbox_psp_cmd_spi_erase *cmd_buf, u64 *target_nv_id, u64 *lba,
+ u64 *num_blocks)
+{
+ *target_nv_id = SMI_TARGET_NVRAM;
+ *lba = read64(&cmd_buf->req.lba);
+ *num_blocks = read64(&cmd_buf->req.num_blocks);
+}