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authorAngel Pons <th3fanbus@gmail.com>2020-10-09 21:15:43 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2020-10-13 10:32:23 +0000
commita2118c7b54f310ab25f44bf4682a01b15c955151 (patch)
tree2352ad5a1e3f589a34ac76cc376aee9c176b0c6b /src
parentd89d0860451f2e2f6c4dc1db57f75e60d5cb2add (diff)
mb/asrock/h110m/romstage.c: Drop invalid SPD addresses
Pictures on the internet show that the Asrock H110M-DVS (Kconfig.name) only has two DIMM slots. Since the vendor's website advertises support for dual channel memory, drop the SPD addresses for the second slot of each channel. The result is the same as several other two-slot boards. Change-Id: I4b62e9196bfa3a688016399d7e025ca995f3c12c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/asrock/h110m/romstage.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c
index 8e72e8ed6e..ca3058fa9f 100644
--- a/src/mainboard/asrock/h110m/romstage.c
+++ b/src/mainboard/asrock/h110m/romstage.c
@@ -15,7 +15,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
FSP_M_CONFIG *const mem_cfg = &mupd->FspmConfig;
struct spd_block blk = {
- .addr_map = { 0x50, 0x51, 0x52, 0x53, },
+ .addr_map = { 0x50, 0x52 },
};
assert(sizeof(mem_cfg->RcompResistor) == sizeof(rcomp_resistors));
@@ -25,9 +25,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
get_spd_smbus(&blk);
mem_cfg->MemorySpdDataLen = blk.len;
mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
- mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2];
- mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1];
- mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3];
+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1];
dump_spd_info(&blk);
memcpy(mem_cfg->RcompResistor, rcomp_resistors, sizeof(mem_cfg->RcompResistor));