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authorMaximilian Brune <maximilian.brune@9elements.com>2022-08-08 12:30:47 +0200
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-12 17:12:12 +0000
commita0bc90e4abfe2ed87865d365436ed99311954e27 (patch)
treeed47e572d73b9db59268197d5da76a18888186a5 /src
parenteb80b1efa36c99e485b2604e913c2aa316168eea (diff)
Add missing ADL-S device identification
R680E, Q670E, H610E are the ADL-S IoT variants TEST=Boot ADL-S RVP DDR5 and see silicon info is reported as PCH: AlderLake-S R680E Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I1804994b4b72f0484eabb15323736679d2668078 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/device/pci_ids.h3
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c3
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c3
3 files changed, 9 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index ec48a120ec..a8cbade924 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3040,6 +3040,9 @@
#define PCI_DID_INTEL_ADP_S_ESPI_29 0x7a9d
#define PCI_DID_INTEL_ADP_S_ESPI_30 0x7a9e
#define PCI_DID_INTEL_ADP_S_ESPI_31 0x7a9f
+#define PCI_DID_INTEL_ADP_S_ESPI_H610E 0x7a92
+#define PCI_DID_INTEL_ADP_S_ESPI_Q670E 0x7a91
+#define PCI_DID_INTEL_ADP_S_ESPI_R680E 0x7a90
#define PCI_DID_INTEL_ADP_S_H610 0x7a87
#define PCI_DID_INTEL_ADP_S_B660 0x7a86
#define PCI_DID_INTEL_ADP_S_H670 0x7a85
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 6d6261b13a..517f24279f 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -115,6 +115,9 @@ static struct {
{ PCI_DID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" },
{ PCI_DID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" },
{ PCI_DID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" },
+ { PCI_DID_INTEL_ADP_S_ESPI_H610E, "AlderLake-S H610E" },
+ { PCI_DID_INTEL_ADP_S_ESPI_Q670E, "AlderLake-S Q670E" },
+ { PCI_DID_INTEL_ADP_S_ESPI_R680E, "AlderLake-S R680E" },
{ PCI_DID_INTEL_ADP_S_H610, "AlderLake-S H610" },
{ PCI_DID_INTEL_ADP_S_B660, "AlderLake-S B660" },
{ PCI_DID_INTEL_ADP_S_H670, "AlderLake-S H670" },
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 2ba4cd60a7..55437ba24d 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -380,6 +380,9 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_ADP_S_ESPI_29,
PCI_DID_INTEL_ADP_S_ESPI_30,
PCI_DID_INTEL_ADP_S_ESPI_31,
+ PCI_DID_INTEL_ADP_S_ESPI_H610E,
+ PCI_DID_INTEL_ADP_S_ESPI_Q670E,
+ PCI_DID_INTEL_ADP_S_ESPI_R680E,
PCI_DID_INTEL_ADP_M_N_ESPI_0,
PCI_DID_INTEL_ADP_M_N_ESPI_1,
PCI_DID_INTEL_ADP_M_N_ESPI_2,