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authorReka Norman <rekanorman@chromium.org>2022-06-01 09:02:39 +1000
committerPaul Fagerburg <pfagerburg@chromium.org>2022-06-03 15:22:36 +0000
commit9b1fc309ed097852061cbff867fc15296841430c (patch)
tree198f96393fa624247c0977a854154c2ee98ad279 /src
parent272eac4929e82a5dc36749c0a1ad0d646084178a (diff)
mb/google/nissa/var/nivviks: Enable ISH when UFS is present
In order to enable the UFS controller (PCI device 12.7), the PCI specification says that the device at function 0 in the same slot must also be enabled, which is the ISH. Therefore, enable ISH when UFS is present. For more context on why this is necessary, see CB:62662 which enabled UFS and ISH for adlrvp_n. BUG=b:234136500 TEST=Build test. Will test that UFS works once we have hardware. Signed-off-by: Reka Norman <rekanorman@chromium.org> Change-Id: Ib60d44322cfbd8f82c33ecac7598881dfb1d0c3c Reviewed-on: https://review.coreboot.org/c/coreboot/+/64845 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Daniil Lunev <dlunev@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/nivviks/overridetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index 667a409f46..34b142a0eb 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -343,6 +343,9 @@ chip soc/intel/alderlake
device ref emmc on
probe STORAGE STORAGE_EMMC
end
+ device ref ish on
+ probe STORAGE STORAGE_UFS
+ end
device ref ufs on
probe STORAGE STORAGE_UFS
end