diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2015-08-06 15:46:32 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-08-07 07:16:43 +0200 |
commit | 916e4085262461a362e7329e0d888b986dc77cc6 (patch) | |
tree | c8f3a06c7e77deec92ccb0b94aef7e0f52dd1daf /src | |
parent | e07e0441c282f376af6efa3349a31e28faa04ec7 (diff) |
amd/model_10xxx: Move CPU microcode to 3rdparty/blobs
Change-Id: Ib053bdec185eca2b45c95bec713cf0fb6d16c0bc
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11130
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000095.h | 163 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000096.h | 163 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000c7.h | 164 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000c8.h | 164 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000d9.h | 164 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000db.h | 164 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000dc.h | 164 | ||||
-rw-r--r-- | src/cpu/amd/model_10xxx/microcode_blob.c | 8 |
8 files changed, 1 insertions, 1153 deletions
diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000095.h b/src/cpu/amd/model_10xxx/mc_patch_01000095.h deleted file mode 100644 index bfb2e107f7..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000095.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2009 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x08, 0x20, 0x04, 0x11, 0x95, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x9d, 0xd7, 0xa4, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x22, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x70, 0x09, 0x00, 0x00, -0x49, 0x01, 0x00, 0x00, 0x8b, 0x01, 0x00, 0x00, 0xc1, 0x08, 0x00, 0x00, -0xaa, 0x0b, 0x00, 0x00, 0x56, 0x0f, 0x00, 0x00, 0x9e, 0x0b, 0x00, 0x00, -0x70, 0x0c, 0x00, 0x00, 0x2a, 0xff, 0xff, 0x29, 0xc3, 0x5f, 0xd0, 0xc1, -0xbd, 0xff, 0xff, 0xb3, 0x0f, 0xff, 0x7e, 0xfd, 0xf6, 0x1f, 0xf8, 0x57, -0x3c, 0xbc, 0x63, 0x2d, 0x80, 0x96, 0xd6, 0x00, 0xaa, 0xff, 0xef, 0xaf, -0xe0, 0xd1, 0x9f, 0x15, 0x57, 0xef, 0xff, 0xff, 0xea, 0x87, 0x7f, 0xbf, -0x03, 0xfa, 0x0f, 0xfc, 0xfc, 0x1f, 0xbe, 0xf5, 0x00, 0xe0, 0x4a, 0x4b, -0x7f, 0xc8, 0xff, 0xf7, 0xb4, 0xf8, 0xf0, 0x2f, 0xff, 0x1f, 0xc5, 0xfe, -0xc0, 0xcf, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x08, 0x20, 0x05, 0x11, 0x96, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x85, 0xd4, 0x2d, 0x6d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x20, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x70, 0x09, 0x00, 0x00, -0x49, 0x01, 0x00, 0x00, 0x8b, 0x01, 0x00, 0x00, 0xc1, 0x08, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0x56, 0x0f, 0x00, 0x00, 0x9e, 0x0b, 0x00, 0x00, -0x70, 0x0c, 0x00, 0x00, 0x2a, 0xff, 0xff, 0x29, 0xc3, 0x5f, 0xd0, 0xc1, -0xbd, 0xff, 0xff, 0xb3, 0x0f, 0xff, 0x7e, 0xfd, 0xf6, 0x1f, 0xf8, 0x57, -0x3c, 0xbc, 0x63, 0x2d, 0x80, 0x96, 0xd6, 0x00, 0xaa, 0xff, 0xef, 0xaf, -0xe0, 0xd1, 0x9f, 0x15, 0x57, 0xef, 0xff, 0xff, 0xea, 0x87, 0x7f, 0xbf, -0x03, 0xfa, 0x0f, 0xfc, 0xfc, 0x1f, 0xbe, 0xf5, 0x00, 0xe0, 0x4a, 0x4b, -0x7f, 0xc8, 0xff, 0xf7, 0xb4, 0xf8, 0xf0, 0x2f, 0xff, 0x1f, 0xc5, 0xfe, -0xc0, 0xcf, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ -// 1062h - -0x10, 0x20, 0x11, 0x03, 0xC7, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xB8, 0x53, 0x63, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x62, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x9A, 0x0B, 0x00, 0x00, -0x16, 0x0C, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, -0x51, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -0xFF, 0xFF, 0xFF, 0xFF, 0x6F, 0x58, 0x39, 0x00, 0x81, 0x3F, 0xA0, 0xD7, -0x04, 0x00, 0xFC, 0xB7, 0x0F, 0xFF, 0x58, 0xF7, 0x72, 0xC0, 0xFF, 0x6F, -0x3C, 0xFC, 0x03, 0xFC, 0xC0, 0x18, 0xD5, 0x00, 0x80, 0xFF, 0x66, 0x3C, -0xEB, 0xC0, 0x9F, 0xD9, 0x4D, 0xEE, 0xF8, 0xFF, 0xFF, 0x83, 0x7F, 0xA6, -0x07, 0xE8, 0xFF, 0xFF, 0xE8, 0x1F, 0xBE, 0xB5, 0x00, 0x60, 0x2F, 0x6A, -0xBF, 0xE8, 0x04, 0xFF, 0xF5, 0xF3, 0xF0, 0xAF, 0x7A, 0x00, 0xFF, 0xD9, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ -// 1043h - -0x10, 0x20, 0x11, 0x03, 0xC8, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x6A, 0x99, 0x77, 0xEF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x43, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x10, 0x0C, 0x00, 0x00, -0x55, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x03, 0x00, 0x00, -0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -0xFF, 0xFF, 0xFF, 0xFF, 0x18, 0x80, 0x38, 0xC0, 0x83, 0x37, 0x80, 0xFF, -0xB8, 0xFF, 0xFF, 0x13, 0x0E, 0xBF, 0x0C, 0xB6, 0x7A, 0xC4, 0xFF, 0x2F, -0x3C, 0xFC, 0x6B, 0xFD, 0x40, 0x03, 0xD4, 0x00, 0x97, 0xFF, 0xFF, 0xFF, -0xE7, 0xE1, 0x1F, 0xE0, 0x00, 0xFE, 0xBF, 0xF5, 0x9F, 0x87, 0x7E, 0x22, -0x01, 0xC6, 0x00, 0xC4, 0x7C, 0x1E, 0xFA, 0x01, 0x00, 0xE0, 0xFF, 0x7B, -0x0E, 0x40, 0xBD, 0x55, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x00, 0xE0, 0xFF, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ -//1081h - -0x11, 0x20, 0x12, 0x10, 0xD9, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x6E, 0x87, 0xD2, 0xEA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x81, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xA7, 0x0B, 0x00, 0x00, -0x14, 0x0C, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0x08, 0x0A, 0x00, 0x00, -0x51, 0x03, 0x00, 0x00, 0x0C, 0x0E, 0x00, 0x00, 0xC4, 0x07, 0x00, 0x00, -0x9A, 0x0B, 0x00, 0x00, 0x4F, 0xDF, 0x38, 0x00, 0x81, 0x3F, 0x20, 0xC0, -0x4E, 0xF0, 0xFF, 0xBF, 0x0F, 0xFF, 0x5E, 0x3F, 0xF0, 0xDF, 0xAD, 0x07, -0x3D, 0xF8, 0x7B, 0x7B, 0x80, 0x00, 0xD4, 0x00, 0x13, 0xF1, 0xFF, 0xFF, -0xAC, 0xE1, 0x1F, 0xE0, 0x4E, 0xFE, 0xBB, 0xFF, 0xFE, 0x87, 0x7F, 0xA7, -0x03, 0xF8, 0x7F, 0xD6, 0x7C, 0x1E, 0xFA, 0xBD, 0x00, 0xE0, 0xFF, 0x7B, -0x0E, 0x00, 0x3D, 0x57, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x2E, 0xFE, 0xFF, -0xC0, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ -// 1041h - -0x11, 0x20, 0x24, 0x10, 0xDB, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xB9, 0xE4, 0xBE, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x41, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xA0, 0x09, 0x00, 0x00, -0xA5, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xA1, 0x09, 0x00, 0x00, -0xFF, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -0xFF, 0xFF, 0xFF, 0xFF, 0x97, 0xD1, 0x7F, 0x00, 0x83, 0x3F, 0x36, 0xC0, -0xA0, 0x1B, 0xF8, 0x13, 0x0E, 0xBF, 0x0C, 0xB4, 0xF2, 0x1F, 0xF8, 0xA7, -0x3C, 0xFC, 0x03, 0xFC, 0x40, 0x03, 0x54, 0x00, 0x92, 0xFF, 0xE0, 0xBF, -0xE7, 0xE1, 0x1F, 0xE0, 0x5F, 0x9E, 0xFA, 0xFF, 0x9F, 0x87, 0x7F, 0x80, -0x03, 0xF8, 0xFF, 0xC6, 0x01, 0x0E, 0xFC, 0xBD, 0x00, 0xA0, 0x2A, 0x69, -0x0E, 0x40, 0xBD, 0x55, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x00, 0xE0, 0xFF, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ -// 10A0h - -0x11, 0x20, 0x24, 0x10, 0xDC, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x0C, 0x0B, 0x36, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0xA0, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x74, 0x0F, 0x00, 0x00, -0xBE, 0x01, 0x00, 0x00, 0x33, 0x0E, 0x00, 0x00, 0xA9, 0x01, 0x00, 0x00, -0x75, 0x00, 0x00, 0x00, 0x73, 0x02, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, -0x51, 0x03, 0x00, 0x00, 0xA0, 0xFD, 0xFF, 0x28, 0xC3, 0x3F, 0xC0, 0xCF, -0xFF, 0x07, 0xE2, 0x01, 0x0F, 0xDE, 0x50, 0xFE, 0xF2, 0xDF, 0xFF, 0x0F, -0x3B, 0xFC, 0x01, 0xC5, 0x00, 0x03, 0xD4, 0x00, 0x80, 0xFF, 0xFE, 0x7F, -0xFE, 0xE1, 0x1B, 0xC8, 0x5B, 0xF6, 0xFF, 0xFF, 0x7B, 0x87, 0x5F, 0xAD, -0x6B, 0xF9, 0x6F, 0xFE, 0xFA, 0x1F, 0xFE, 0xB5, 0x00, 0x40, 0x11, 0x6A, -0x0E, 0xC0, 0x9B, 0x56, 0xE8, 0x75, 0xE0, 0x0F, 0x38, 0x00, 0xCF, 0xCC, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, diff --git a/src/cpu/amd/model_10xxx/microcode_blob.c b/src/cpu/amd/model_10xxx/microcode_blob.c index f4c8438432..a51b993134 100644 --- a/src/cpu/amd/model_10xxx/microcode_blob.c +++ b/src/cpu/amd/model_10xxx/microcode_blob.c @@ -1,9 +1,3 @@ unsigned char microcode[] __attribute__ ((aligned(16))) = { -#include "mc_patch_010000c7.h" -#include "mc_patch_010000c8.h" -#include "mc_patch_010000d9.h" -#include "mc_patch_010000db.h" -#include "mc_patch_010000dc.h" -#include "mc_patch_01000095.h" -#include "mc_patch_01000096.h" +#include "../../../../3rdparty/blobs/cpu/amd/model_10xxx/microcode.h" }; |