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authorTarun Tuli <taruntuli@google.com>2022-08-24 23:47:14 -0400
committerSubrata Banik <subratabanik@google.com>2022-08-25 12:06:14 +0000
commit90eca855960e9ae49c0218e47aa0f5655157ac9c (patch)
treea05d138f25282f74f68c38fee182418c8bba6496 /src
parenta35c0e81b6db65db82faf58386997111413cb687 (diff)
mb/google/rex: Update DQS for Rex
Update the DQS for Rex as per the latest Rex schematics (08/25). BUG=b:243734885 TEST=Built successfully. Confirmed on HW. Change-Id: I2a458a3da725f953cbba8a194ac6f314f5467419 Signed-off-by: Tarun Tuli <taruntuli@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67041 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maulik Vaghela <maulikvaghela@google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/memory.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/memory.c b/src/mainboard/google/rex/variants/baseboard/rex/memory.c
index 9eaef9559a..1541cec950 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/memory.c
+++ b/src/mainboard/google/rex/variants/baseboard/rex/memory.c
@@ -50,14 +50,14 @@ static const struct mb_cfg baseboard_memcfg = {
/* DQS CPU<>DRAM map */
.lpx_dqs_map = {
- .ddr0 = { .dqs0 = 1, .dqs1 = 0 },
- .ddr1 = { .dqs0 = 0, .dqs1 = 1 },
- .ddr2 = { .dqs0 = 0, .dqs1 = 1 },
- .ddr3 = { .dqs0 = 0, .dqs1 = 1 },
+ .ddr0 = { .dqs0 = 0, .dqs1 = 1 },
+ .ddr1 = { .dqs0 = 1, .dqs1 = 0 },
+ .ddr2 = { .dqs0 = 1, .dqs1 = 0 },
+ .ddr3 = { .dqs0 = 1, .dqs1 = 0 },
.ddr4 = { .dqs0 = 1, .dqs1 = 0 },
.ddr5 = { .dqs0 = 0, .dqs1 = 1 },
.ddr6 = { .dqs0 = 0, .dqs1 = 1 },
- .ddr7 = { .dqs0 = 0, .dqs1 = 1 },
+ .ddr7 = { .dqs0 = 1, .dqs1 = 0 },
},
.lp5x_config = {