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authorJulius Werner <jwerner@chromium.org>2014-12-08 13:16:03 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-13 17:42:07 +0200
commit8d978a88e6ccfa809879667de4098068be8efb5c (patch)
tree1635d7c6a24dec3146871266b8d12aab2ea777c9 /src
parente244986e40f0e3b9e08b2156bcc45f6fc18976d2 (diff)
rk3288/exynos5250/exynos5420: Consolidate timer files
Some boards spread their timer implementation out in multiple files with one function each for no discernable reason. Let's clean that up to make things a little simpler to find. BRANCH=None BUG=None TEST=Booted Pinky, compiled Daisy and Pit. Change-Id: I8b543d1a0d9af37bde5433b0c9271d687b2404b2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 887765e1bd88d7aa49ad9a5e98b8831c10da6c10 Original-Change-Id: I43d29cd1b4a1d89cfd40f6cba5ca99ada3b00f82 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/234061 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9601 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/rockchip/rk3288/Makefile.inc4
-rw-r--r--src/soc/rockchip/rk3288/monotonic_timer.c40
-rw-r--r--src/soc/rockchip/rk3288/timer.c18
-rw-r--r--src/soc/samsung/exynos5250/Makefile.inc9
-rw-r--r--src/soc/samsung/exynos5250/mct.c36
-rw-r--r--src/soc/samsung/exynos5250/timer.c (renamed from src/soc/samsung/exynos5420/monotonic_timer.c)15
-rw-r--r--src/soc/samsung/exynos5420/Makefile.inc12
-rw-r--r--src/soc/samsung/exynos5420/mct.c36
-rw-r--r--src/soc/samsung/exynos5420/timer.c (renamed from src/soc/samsung/exynos5250/monotonic_timer.c)15
9 files changed, 54 insertions, 131 deletions
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index 836f2a7bea..01ed81b5c9 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -25,7 +25,6 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
bootblock-y += timer.c
-bootblock-y += monotonic_timer.c
bootblock-y += clock.c
bootblock-y += spi.c
bootblock-y += media.c
@@ -33,7 +32,6 @@ bootblock-y += gpio.c
bootblock-y += i2c.c
bootblock-y += rk808.c
-verstage-y += monotonic_timer.c
verstage-y += spi.c
verstage-y += timer.c
verstage-$(CONFIG_DRIVERS_UART) += uart.c
@@ -44,7 +42,6 @@ verstage-y += media.c
romstage-y += cbmem.c
romstage-y += timer.c
-romstage-y += monotonic_timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += i2c.c
romstage-y += clock.c
@@ -58,7 +55,6 @@ romstage-y += tsadc.c
ramstage-y += soc.c
ramstage-y += cbmem.c
ramstage-y += timer.c
-ramstage-y += monotonic_timer.c
ramstage-y += i2c.c
ramstage-y += clock.c
ramstage-y += spi.c
diff --git a/src/soc/rockchip/rk3288/monotonic_timer.c b/src/soc/rockchip/rk3288/monotonic_timer.c
deleted file mode 100644
index 4062860465..0000000000
--- a/src/soc/rockchip/rk3288/monotonic_timer.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Rockchip Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include <soc/addressmap.h>
-#include <soc/timer.h>
-#include <stdint.h>
-#include <timer.h>
-
-static uint64_t timer_raw_value(void)
-{
- uint64_t value0;
- uint64_t value1;
-
- value0 = (uint64_t)read32(&timer7_ptr->timer_curr_value0);
- value1 = (uint64_t)read32(&timer7_ptr->timer_curr_value1);
- value0 = value0 | value1<<32;
- return value0;
-}
-
-void timer_monotonic_get(struct mono_time *mt)
-{
- mono_time_set_usecs(mt, timer_raw_value() / clocks_per_usec);
-}
diff --git a/src/soc/rockchip/rk3288/timer.c b/src/soc/rockchip/rk3288/timer.c
index 658f4d74f4..47f99c23fd 100644
--- a/src/soc/rockchip/rk3288/timer.c
+++ b/src/soc/rockchip/rk3288/timer.c
@@ -18,11 +18,27 @@
*/
#include <arch/io.h>
-#include <console/console.h>
#include <delay.h>
#include <soc/timer.h>
+#include <stdint.h>
#include <timer.h>
+static uint64_t timer_raw_value(void)
+{
+ uint64_t value0;
+ uint64_t value1;
+
+ value0 = (uint64_t)read32(&timer7_ptr->timer_curr_value0);
+ value1 = (uint64_t)read32(&timer7_ptr->timer_curr_value1);
+ value0 = value0 | value1<<32;
+ return value0;
+}
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+ mono_time_set_usecs(mt, timer_raw_value() / clocks_per_usec);
+}
+
void rk3288_init_timer(void)
{
write32(TIMER_LOAD_VAL, &timer7_ptr->timer_load_count0);
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index 4cf2d9675e..6525637382 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -1,10 +1,9 @@
bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c
-bootblock-y += pinmux.c mct.c power.c
+bootblock-y += pinmux.c timer.c power.c
# Clock is required for UART
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
-bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
@@ -18,8 +17,7 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart.
romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c
romstage-y += power.c
-romstage-y += mct.c
-romstage-y += monotonic_timer.c
+romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += wakeup.c
romstage-y += gpio.c
@@ -36,8 +34,7 @@ ramstage-y += power.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += cpu.c
ramstage-y += tmu.c
-ramstage-y += mct.c
-ramstage-y += monotonic_timer.c
+ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += dp-reg.c
diff --git a/src/soc/samsung/exynos5250/mct.c b/src/soc/samsung/exynos5250/mct.c
deleted file mode 100644
index ae6186ab8c..0000000000
--- a/src/soc/samsung/exynos5250/mct.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include <soc/clk.h>
-#include <stdint.h>
-
-uint64_t mct_raw_value(void)
-{
- uint64_t upper = readl(&exynos_mct->g_cnt_u);
- uint64_t lower = readl(&exynos_mct->g_cnt_l);
-
- return (upper << 32) | lower;
-}
-
-void mct_start(void)
-{
- writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
- &exynos_mct->g_tcon);
-}
diff --git a/src/soc/samsung/exynos5420/monotonic_timer.c b/src/soc/samsung/exynos5250/timer.c
index 9dafa23567..0947d19d63 100644
--- a/src/soc/samsung/exynos5420/monotonic_timer.c
+++ b/src/soc/samsung/exynos5250/timer.c
@@ -17,12 +17,27 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/io.h>
#include <soc/clk.h>
#include <stdint.h>
#include <timer.h>
static const uint32_t clocks_per_usec = MCT_HZ/1000000;
+uint64_t mct_raw_value(void)
+{
+ uint64_t upper = readl(&exynos_mct->g_cnt_u);
+ uint64_t lower = readl(&exynos_mct->g_cnt_l);
+
+ return (upper << 32) | lower;
+}
+
+void mct_start(void)
+{
+ writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
+ &exynos_mct->g_tcon);
+}
+
void timer_monotonic_get(struct mono_time *mt)
{
/* We don't have to call mct_start() here
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index 4e92864d5e..7eb407e957 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -1,10 +1,9 @@
bootblock-y += spi.c alternate_cbfs.c
bootblock-y += bootblock.c
-bootblock-y += pinmux.c mct.c power.c
+bootblock-y += pinmux.c timer.c power.c
# Clock is required for UART
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
-bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
@@ -19,8 +18,7 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart.
romstage-y += dmc_common.c
romstage-y += dmc_init_ddr3.c
romstage-y += power.c
-romstage-y += mct.c
-romstage-y += monotonic_timer.c
+romstage-y += timer.c
romstage-$(CONFIG_DRIVERS_UART) += uart.c
romstage-y += wakeup.c
romstage-y += gpio.c
@@ -37,16 +35,14 @@ ramstage-y += power.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += cpu.c
ramstage-y += tmu.c
-ramstage-y += mct.c
-ramstage-y += monotonic_timer.c
+ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += dp.c dp_lowlevel.c fimd.c
ramstage-y += usb.c
ramstage-y += cbmem.c
-rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c
-rmodules_$(ARCH-romstage-y)-y += mct.c
+rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/
diff --git a/src/soc/samsung/exynos5420/mct.c b/src/soc/samsung/exynos5420/mct.c
deleted file mode 100644
index ae6186ab8c..0000000000
--- a/src/soc/samsung/exynos5420/mct.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/io.h>
-#include <soc/clk.h>
-#include <stdint.h>
-
-uint64_t mct_raw_value(void)
-{
- uint64_t upper = readl(&exynos_mct->g_cnt_u);
- uint64_t lower = readl(&exynos_mct->g_cnt_l);
-
- return (upper << 32) | lower;
-}
-
-void mct_start(void)
-{
- writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
- &exynos_mct->g_tcon);
-}
diff --git a/src/soc/samsung/exynos5250/monotonic_timer.c b/src/soc/samsung/exynos5420/timer.c
index 9dafa23567..0947d19d63 100644
--- a/src/soc/samsung/exynos5250/monotonic_timer.c
+++ b/src/soc/samsung/exynos5420/timer.c
@@ -17,12 +17,27 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/io.h>
#include <soc/clk.h>
#include <stdint.h>
#include <timer.h>
static const uint32_t clocks_per_usec = MCT_HZ/1000000;
+uint64_t mct_raw_value(void)
+{
+ uint64_t upper = readl(&exynos_mct->g_cnt_u);
+ uint64_t lower = readl(&exynos_mct->g_cnt_l);
+
+ return (upper << 32) | lower;
+}
+
+void mct_start(void)
+{
+ writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
+ &exynos_mct->g_tcon);
+}
+
void timer_monotonic_get(struct mono_time *mt)
{
/* We don't have to call mct_start() here