diff options
| author | Felix Singer <felixsinger@posteo.net> | 2022-12-12 07:33:35 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-12-14 00:52:23 +0000 |
| commit | 8cc2962b12acf8f5a16e9bdc062d734868889f3b (patch) | |
| tree | f50a2895b89dff9cdf29ad03bfeadefa97365b05 /src | |
| parent | 476fe6ae7e14c10d7411abf1ed447cf54326dd1e (diff) | |
soc/intel/icelake/acpi: Replace Store(a,b) with ASL 2.0 syntax
Replace `Store (a, b)` with `b = a`.
Change-Id: I12560d151d26186e1f4eb0165aa8cef33b7a16aa
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/icelake/acpi/pch_hda.asl | 6 | ||||
| -rw-r--r-- | src/soc/intel/icelake/acpi/scs.asl | 16 |
2 files changed, 11 insertions, 11 deletions
diff --git a/src/soc/intel/icelake/acpi/pch_hda.asl b/src/soc/intel/icelake/acpi/pch_hda.asl index b5b5416f1c..1073f37ae8 100644 --- a/src/soc/intel/icelake/acpi/pch_hda.asl +++ b/src/soc/intel/icelake/acpi/pch_hda.asl @@ -56,9 +56,9 @@ Device (HDAS) CreateQWordField (NBUF, ^NHLT._MAX, NMAS) CreateQWordField (NBUF, ^NHLT._LEN, NLEN) - Store (NHLA, NBAS) - Store (NHLA, NMAS) - Store (NHLL, NLEN) + NBAS = NHLA + NMAS = NHLA + NLEN = NHLL Return (NBUF) } diff --git a/src/soc/intel/icelake/acpi/scs.asl b/src/soc/intel/icelake/acpi/scs.asl index dbc61c8b9a..24a2b28c4f 100644 --- a/src/soc/intel/icelake/acpi/scs.asl +++ b/src/soc/intel/icelake/acpi/scs.asl @@ -37,22 +37,22 @@ Scope (\_SB.PCI0) { Method(_PS0, 0, Serialized) { Stall (50) // Sleep 50 us - Store(0, PGEN) // Disable PG + PGEN = 0 // Disable PG /* Clear register 0x1C20/0x4820 */ ^^SCSC (PID_EMMC) /* Set Power State to D0 */ And (PMCR, 0xFFFC, PMCR) - Store (PMCR, ^TEMP) + ^TEMP = PMCR } Method(_PS3, 0, Serialized) { - Store(1, PGEN) // Enable PG + PGEN = 1 // Enable PG /* Set Power State to D3 */ Or (PMCR, 0x0003, PMCR) - Store (PMCR, ^TEMP) + ^TEMP = PMCR } Device (CARD) @@ -90,23 +90,23 @@ Scope (\_SB.PCI0) { Method (_PS0, 0, Serialized) { - Store (0, PGEN) /* Disable PG */ + PGEN = 0 /* Disable PG */ /* Clear register 0x1C20/0x4820 */ ^^SCSC (PID_SDX) /* Set Power State to D0 */ And (PMCR, 0xFFFC, PMCR) - Store (PMCR, ^TEMP) + ^TEMP = PMCR } Method (_PS3, 0, Serialized) { - Store (1, PGEN) /* Enable PG */ + PGEN = 1 /* Enable PG */ /* Set Power State to D3 */ Or (PMCR, 0x0003, PMCR) - Store (PMCR, ^TEMP) + ^TEMP = PMCR } Device (CARD) |