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authorJonathan Zhang <jonzhang@fb.com>2020-07-17 17:35:12 -0700
committerAngel Pons <th3fanbus@gmail.com>2020-08-11 20:15:30 +0000
commit89ed7900287f3f38134aead3647eb153787604d1 (patch)
treee04a34dcebc4ad4f87da43b83c01eb60fb6a057e /src
parentec886ec6fad3d34f6a9d22ab39871434cefdd219 (diff)
vendorcode/intel/fsp/fsp2_0/CPX-SP: remove non-existing PSTACKs
CPX-SP has a CSTACK and 3 PSTACKs. Clean up the HOB header file to remove reference to non-existing PSTACKs. Adjust mainboard code accordingly. Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Change-Id: Ic52b01cd89fb5b3fce64686d91f017f405566acd Reviewed-on: https://review.coreboot.org/c/coreboot/+/44279 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/ocp/deltalake/ramstage.c10
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h27
2 files changed, 13 insertions, 24 deletions
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index 69d739f7b2..89d466b66c 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -54,17 +54,17 @@ slot_info slotinfo[] = {
{CSTACK, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0xE8, "DL on board M.2 #1 - boot"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "DL on board M.2 #2"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "Mezz Card"},
- {PSTACK3, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "1ou expansion M.2 #1"},
- {PSTACK3, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "1ou expansion M.2 #2"},
- {PSTACK3, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "1ou expansion M.2 #3"},
- {PSTACK3, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "1ou expansion M.2 #4"},
+ {PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "1ou expansion M.2 #1"},
+ {PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "1ou expansion M.2 #2"},
+ {PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "1ou expansion M.2 #3"},
+ {PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "1ou expansion M.2 #4"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2ou expansion M.2 #1"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2ou expansion M.2 #2"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "2ou expansion M.2 #3"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "2ou expansion M.2 #4"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2ou expansion M.2 #5"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2ou expansion M.2 #6"},
- {PSTACK3, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "Mezz Card(Class-2)"},
+ {PSTACK2, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "Mezz Card(Class-2)"},
};
static void dl_oem_smbios_strings(struct device *dev, struct smbios_type11 *t)
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
index a9465e1677..8f9a91a0e9 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
@@ -90,32 +90,23 @@ typedef struct {
IIO PCIe Ports
**/
typedef enum {
+ // IOU0, CSTACK
PORT_0 = 0,
- // IOU0
+ // IOU1, PSTACK0
PORT_1A,
PORT_1B,
PORT_1C,
PORT_1D,
- // IOU1
+ // IOU2, PSTACK1
PORT_2A,
PORT_2B,
PORT_2C,
PORT_2D,
- // IOU2
- PORT_4A,
- PORT_4B,
- PORT_4C,
- PORT_4D,
- // MCP0
- PORT_5A,
- PORT_5B,
- PORT_5C,
- PORT_5D,
- // MCP1
- PORT_6A,
- PORT_6B,
- PORT_6C,
- PORT_6D,
+ // IOU3, PSTACK2
+ PORT_3A,
+ PORT_3B,
+ PORT_3C,
+ PORT_3D,
MAX_PORTS
} PCIE_PORTS;
@@ -127,8 +118,6 @@ typedef enum {
PSTACK0,
PSTACK1,
PSTACK2,
- PSTACK3,
- PSTACK4,
MAX_STACKS
} IIO_STACKS;