aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorEric Lai <ericr_lai@compal.corp-partner.google.com>2022-01-19 11:54:21 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-01-20 16:25:03 +0000
commit85f691ab8d5551635f1fe12f46dc566e334e7d6a (patch)
treed075f7a89d0b2ec8aea8a05d2f11d9bfd2fe3d19 /src
parent47486b92ced6ad544362ef531334409cfcfc56e4 (diff)
mb/google/brya/var/banshee: Add SODIMM support
Banshee will use SODIMM. Add memory.c to override baseboard. BUG=b:208910227 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I4d2fe986b786b3553b67910b589fce12647ee69a Reviewed-on: https://review.coreboot.org/c/coreboot/+/61192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/Kconfig2
-rw-r--r--src/mainboard/google/brya/Kconfig.name1
-rw-r--r--src/mainboard/google/brya/variants/banshee/Makefile.inc1
-rw-r--r--src/mainboard/google/brya/variants/banshee/memory.c37
4 files changed, 40 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 15e09e8dcd..1b00b8eb4a 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -40,7 +40,7 @@ config BOARD_GOOGLE_BRYA_COMMON
config BOARD_GOOGLE_BASEBOARD_BRYA
def_bool n
select BOARD_GOOGLE_BRYA_COMMON
- select MEMORY_SOLDERDOWN
+ select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE
select SOC_INTEL_ALDERLAKE_PCH_P
select SYSTEM_TYPE_LAPTOP
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index bdfdfb0442..549594169e 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -154,3 +154,4 @@ config BOARD_GOOGLE_VOLMAR
config BOARD_GOOGLE_BANSHEE
bool "-> Banshee"
select BOARD_GOOGLE_BASEBOARD_BRYA
+ select MEMORY_SODIMM
diff --git a/src/mainboard/google/brya/variants/banshee/Makefile.inc b/src/mainboard/google/brya/variants/banshee/Makefile.inc
new file mode 100644
index 0000000000..fd45b948ff
--- /dev/null
+++ b/src/mainboard/google/brya/variants/banshee/Makefile.inc
@@ -0,0 +1 @@
+romstage-y += memory.c
diff --git a/src/mainboard/google/brya/variants/banshee/memory.c b/src/mainboard/google/brya/variants/banshee/memory.c
new file mode 100644
index 0000000000..7371f57a70
--- /dev/null
+++ b/src/mainboard/google/brya/variants/banshee/memory.c
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <soc/romstage.h>
+
+static const struct mb_cfg ddr4_mem_config = {
+ .type = MEM_TYPE_DDR4,
+
+ .rcomp = {
+ /* Baseboard uses only 100ohm Rcomp resistors */
+ .resistor = 100,
+
+ /* Baseboard Rcomp target values */
+ .targets = {50, 20, 25, 25, 25},
+ },
+
+ .ect = 1, /* Early Command Training */
+
+ .UserBd = BOARD_TYPE_MOBILE,
+};
+
+const struct mb_cfg *variant_memory_params(void)
+{
+ return &ddr4_mem_config;
+}
+
+bool variant_is_half_populated(void)
+{
+ return false;
+}
+
+void variant_get_spd_info(struct mem_spd *spd_info)
+{
+ spd_info->topo = MEM_TOPO_DIMM_MODULE;
+ spd_info->smbus[0].addr_dimm[0] = 0x50;
+ spd_info->smbus[1].addr_dimm[0] = 0x52;
+}