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authorFelix Singer <felixsinger@posteo.net>2022-01-02 01:34:26 +0100
committerFelix Singer <felixsinger@posteo.net>2022-06-09 09:17:52 +0000
commit8353e9a8a788f0eba618828519897dfcb498e0ff (patch)
tree935363707deac6f33e8998594c7ffa37176f69e7 /src
parent0375b828f96cffbb0da1b093c458ba51f2c4cc24 (diff)
ec/smsc/mec1308/acpi: Replace LLess(a,b) with ASL 2.0 syntax
Replace `LLess(a, b)` with `a < b`. Change-Id: Ib96cf05f575a2868b2ad0c00fd5486d6e2c5d90a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Diffstat (limited to 'src')
-rw-r--r--src/ec/smsc/mec1308/acpi/battery.asl3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/ec/smsc/mec1308/acpi/battery.asl b/src/ec/smsc/mec1308/acpi/battery.asl
index 3ba3149655..9fd5ff6f46 100644
--- a/src/ec/smsc/mec1308/acpi/battery.asl
+++ b/src/ec/smsc/mec1308/acpi/battery.asl
@@ -157,8 +157,7 @@ Device (BAT0)
// See if within ~3% of full
ShiftRight (Local2, 5, Local3)
- If (LGreater (Local1, Local2 - Local3) &&
- LLess (Local1, Local2 + Local3))
+ If (LGreater (Local1, Local2 - Local3) && Local1 < Local2 + Local3)
{
Store (Local2, Local1)
}