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authorzhaojohn <john.zhao@intel.com>2022-10-25 12:38:20 -0700
committerSubrata Banik <subratabanik@google.com>2022-11-02 06:50:12 +0000
commit80a3b9659325bbefa9403f96ecae9303df347b79 (patch)
tree578ae9c08421d7afcb4a25e1251262e53fe24d20 /src
parentb5d402e3886296261eb6134a3f8905c29c7f98c0 (diff)
mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports
Rex board only uses TBT PCIe root ports 0 and 2. This change disables rp1 and rp3 root ports. BUG=b:254207628 TEST=Booted to OS and verified rp1 and rp3 root ports were disabled. Change-Id: Ia5c1d657c0ad0482619d739f8949bc9168eac25b Signed-off-by: zhaojohn <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68854 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/rex0/overridetree.cb2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index 2e1c159670..c14077b3cd 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -136,9 +136,7 @@ chip soc/intel/meteorlake
}"
end #PCIE11 SD card
device ref tbt_pcie_rp0 on end
- device ref tbt_pcie_rp1 on end
device ref tbt_pcie_rp2 on end
- device ref tbt_pcie_rp3 on end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on