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authorDinesh Gehlot <digehlot@google.com>2022-11-15 15:39:01 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-11-17 13:39:51 +0000
commit7c6dd796f26f8f23eb531cf13bd79d22cfad945a (patch)
treed102ad9182be20de694d80a679ec63187fe0fb77 /src
parentac435b4b911212598ce70092ce5c67a21a9f1111 (diff)
soc/intel/meteorlake: Implement report_cache_info() function
Make use of deterministic cache helper functions from Meteor Lake SoC code to print useful information during boot as below: Cache: Level 3: Associativity = 12 Partitions = 1 Line Size = 64 Sets = 32768 Cache size = 24 MiB Port of commit 55f5410fcd78 ("soc/intel/alderlake: Implement report_cache_info() function") BUG=none TEST=Build and Boot verified on google/rex Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: I561658c8da0136d6c3d9578f22f5d320e542457d Reviewed-on: https://review.coreboot.org/c/coreboot/+/69681 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/meteorlake/bootblock/report_platform.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/bootblock/report_platform.c b/src/soc/intel/meteorlake/bootblock/report_platform.c
index 6acf9227c8..156102d696 100644
--- a/src/soc/intel/meteorlake/bootblock/report_platform.c
+++ b/src/soc/intel/meteorlake/bootblock/report_platform.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <commonlib/helpers.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/intel/cpu_ids.h>
@@ -65,6 +66,21 @@ static inline uint16_t get_dev_id(pci_devfn_t dev)
return pci_read_config16(dev, PCI_DEVICE_ID);
}
+static void report_cache_info(void)
+{
+ int cache_level = CACHE_L3;
+ struct cpu_cache_info info;
+
+ if (!fill_cpu_cache_info(cache_level, &info))
+ return;
+
+ printk(BIOS_INFO, "Cache: Level %d: ", cache_level);
+ printk(BIOS_INFO, "Associativity = %zd Partitions = %zd Line Size = %zd Sets = %zd\n",
+ info.num_ways, info.physical_partitions, info.line_size, info.num_sets);
+
+ printk(BIOS_INFO, "Cache size = %zu MiB\n", get_cache_size(&info)/MiB);
+}
+
static void report_cpu_info(void)
{
u32 i, cpu_id, cpu_feature_flag;
@@ -95,6 +111,8 @@ static void report_cpu_info(void)
printk(BIOS_DEBUG,
"CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);
+
+ report_cache_info();
}
static void report_mch_info(void)