diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2024-03-21 14:48:14 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-22 16:21:53 +0000 |
| commit | 7c15e0c4669380c8b683611e984c5f6c79b219b5 (patch) | |
| tree | a018bfac56c47124278f427aa8968c66a424c916 /src | |
| parent | c8ae83eeb71872af3901add99221441d04af6af1 (diff) | |
mb/starlabs/starbook/adl: Set RP9 detection timeout to 50ms
Certain SSDs are not detected in the default time window, so
change this to 50ms to allow these SSDs to be detected.
Change-Id: I60e66096ef9ea0146a1bc72c5c74234353509439
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81398
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/adl/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb index f7b45d3393..2437880ce0 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb @@ -115,6 +115,7 @@ chip soc/intel/alderlake .clk_src = 1, .clk_req = 1, .flags = PCIE_RP_LTR | PCIE_RP_AER, + .pcie_rp_detect_timeout_ms = 50, }" smbios_slot_desc "SlotTypeM2Socket3" |