soc/intel/common: Add function to get soc reserved memory size

This patch ensures to consider soc reserved memory size while
allocating DRAM based resources.

Change-Id: I587a9c1ea44f2dbf67099fef03d0ff92bc44f242
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/21539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2 files changed, 18 insertions, 4 deletions

diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index 522d924c0b..64b2c36f05 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -103,4 +103,8 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *resource_cnt);
 /* SoC specific APIs to get UNCORE PRMRR base and mask values
  * returns 0, if able to get base and mask values; otherwise returns -1 */
 int soc_get_uncore_prmmr_base_and_mask(uint64_t *base, uint64_t *mask);
+
+/* SoC call to summarize all Intel Reserve MMIO size and report to SA */
+size_t soc_reserved_mmio_size(void);
+
 #endif	/* SOC_INTEL_COMMON_BLOCK_SA_H */
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 3be65f919b..5be9fe1511 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -43,6 +43,11 @@ __attribute__((weak)) int soc_get_uncore_prmmr_base_and_mask(uint64_t *base,
 	return -1;
 }
 
+__attribute__((weak)) size_t soc_reserved_mmio_size(void)
+{
+	return 0;
+}
+
 /*
  * Add all known fixed MMIO ranges that hang off the host bridge/memory
  * controller device.
@@ -141,6 +146,7 @@ static void sa_add_dram_resources(struct device *dev, int *resource_count)
 {
 	uintptr_t base_k, touud_k;
 	size_t dpr_size = 0, size_k;
+	size_t reserved_mmio_size;
 	uint64_t sa_map_values[MAX_MAP_ENTRIES];
 	uintptr_t top_of_ram;
 	int index = *resource_count;
@@ -148,6 +154,9 @@ static void sa_add_dram_resources(struct device *dev, int *resource_count)
 	if (IS_ENABLED(CONFIG_SA_ENABLE_DPR))
 		dpr_size = sa_get_dpr_size();
 
+        /* Get SoC reserve memory size as per user selection */
+        reserved_mmio_size = soc_reserved_mmio_size();
+
 	top_of_ram = (uintptr_t)cbmem_top();
 
 	/* 0 - > 0xa0000 */
@@ -162,13 +171,14 @@ static void sa_add_dram_resources(struct device *dev, int *resource_count)
 
 	sa_get_mem_map(dev, &sa_map_values[0]);
 
-	/* top_of_ram -> TSEG - DPR */
+	/* top_of_ram -> TSEG - DPR - Intel Reserve Memory Size*/
 	base_k = top_of_ram;
-	size_k = sa_map_values[SA_TSEG_REG] - dpr_size - base_k;
+	size_k = sa_map_values[SA_TSEG_REG] - dpr_size - base_k
+			- reserved_mmio_size;
 	mmio_resource(dev, index++, base_k / KiB, size_k / KiB);
 
-	/* TSEG - DPR -> BGSM */
-	base_k = sa_map_values[SA_TSEG_REG] - dpr_size;
+	/* TSEG - DPR - Intel Reserve Memory Size -> BGSM */
+	base_k = sa_map_values[SA_TSEG_REG] - dpr_size - reserved_mmio_size;
 	size_k = sa_map_values[SA_BGSM_REG] - base_k;
 	reserved_ram_resource(dev, index++, base_k / KiB, size_k / KiB);