diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-09-11 14:02:34 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-13 09:59:56 +0000 |
| commit | 71dbcf127ad26b6caa68e242f1404aae27bb49ae (patch) | |
| tree | 3d4afbfb888e4aa53ac6f86e21fcb1057133998d /src | |
| parent | 2b84008ed9a5d14b519834d6d85c4955fa326684 (diff) | |
drivers/intel/fsp2_0: Allocate cfg_region_size for UPD
In FSP-S, the driver constructs its pointer to UPD using the offset
in the header. Similarly, use the header's cfg_region_size for
allocating memory and copying the default configuration.
Add sanity checks for unexpedted configuration and UPD header
conditions.
TEST=Verify OK on Mandolin, verify a mock error condition
BUG=b:140648081
Change-Id: I20fad0e27a2ad537898b6d01e5241e1508da690c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index e72e4ac163..ecc6e96ace 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -39,9 +39,17 @@ static void do_silicon_init(struct fsp_header *hdr) die_with_post_code(POST_INVALID_VENDOR_BINARY, "Invalid FSPS signature\n"); - upd = xmalloc(sizeof(FSPS_UPD)); + /* Disallow invalid config regions. Default settings are likely bad + * choices for coreboot, and different sized UPD from what the region + * allows is potentially a build problem. + */ + if (!hdr->cfg_region_size || hdr->cfg_region_size != sizeof(FSPS_UPD)) + die_with_post_code(POST_INVALID_VENDOR_BINARY, + "Invalid FSPS UPD region\n"); + + upd = xmalloc(hdr->cfg_region_size); - memcpy(upd, supd, sizeof(FSPS_UPD)); + memcpy(upd, supd, hdr->cfg_region_size); /* Give SoC/mainboard a chance to populate entries */ platform_fsp_silicon_init_params_cb(upd); |